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author | Andrew Cagney <cagney@redhat.com> | 1998-02-13 05:19:02 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1998-02-13 05:19:02 +0000 |
commit | 93c6a010dc099f1ce3ec11872642d74822acd75f (patch) | |
tree | 2e8a64dfd28fb5a625960b2590ba5d699cff0776 /sim/testsuite/d10v-elf/t-sp.s | |
parent | d04b9852c015ef0812fe3f24592e7aaa9393c2c4 (diff) | |
download | gdb-93c6a010dc099f1ce3ec11872642d74822acd75f.zip gdb-93c6a010dc099f1ce3ec11872642d74822acd75f.tar.gz gdb-93c6a010dc099f1ce3ec11872642d74822acd75f.tar.bz2 |
Test switching between SPI/SPU.
Diffstat (limited to 'sim/testsuite/d10v-elf/t-sp.s')
-rw-r--r-- | sim/testsuite/d10v-elf/t-sp.s | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/sim/testsuite/d10v-elf/t-sp.s b/sim/testsuite/d10v-elf/t-sp.s new file mode 100644 index 0000000..84f9ad4 --- /dev/null +++ b/sim/testsuite/d10v-elf/t-sp.s @@ -0,0 +1,17 @@ +.include "t-macros.i" + + start + +;;; Read/Write values to SPU/SPI + + loadpsw2 0 + ldi sp, 0xdead + loadpsw2 PSW_SM + ldi sp, 0xbeef + + loadpsw2 0 + check 1 sp 0xdead + loadpsw2 PSW_SM + check 2 sp 0xbeef + + exit0 |