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| author | Andrew Cagney <cagney@redhat.com> | 1997-12-03 08:03:33 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-12-03 08:03:33 +0000 |
| commit | aa49c64f3e93a777b3938daac491bbc983f93cf4 (patch) | |
| tree | 22491077b0399a55a1ef41a72d8429d243afbec0 /sim/testsuite/d10v-elf/t-rep.s | |
| parent | d4b2cc56c066eb021f9873867893f0f408ec8d5d (diff) | |
| download | gdb-aa49c64f3e93a777b3938daac491bbc983f93cf4.zip gdb-aa49c64f3e93a777b3938daac491bbc983f93cf4.tar.gz gdb-aa49c64f3e93a777b3938daac491bbc983f93cf4.tar.bz2 | |
* d10v_sim.h (SEXT56): Define.
* simops.c (OP_4201): For "rac", sign extend 56 bit value before
it is shifted.
* d10v_sim.h (MAX32, MIN32, MASK32, MASK40): Re-define using
SIGNED64 macro.
Diffstat (limited to 'sim/testsuite/d10v-elf/t-rep.s')
| -rw-r--r-- | sim/testsuite/d10v-elf/t-rep.s | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/sim/testsuite/d10v-elf/t-rep.s b/sim/testsuite/d10v-elf/t-rep.s new file mode 100644 index 0000000..b539bd2 --- /dev/null +++ b/sim/testsuite/d10v-elf/t-rep.s @@ -0,0 +1,26 @@ +.include "t-macros.i" + + start + + + + # Check that the instruction @REP_E is executed when it + # is reached using a branch instruction + + ldi r2, 1 +test_rep_1: + rep r2, end_rep_1 + nop || nop + nop || nop + nop || nop + nop || nop + ldi r3, 46 + bra end_rep_1 + ldi r3, 42 +end_rep_1: + addi r3, 1 + + check 1 r3 47 + + + exit0 |