diff options
| author | Andrew Cagney <cagney@redhat.com> | 1997-12-08 03:22:58 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-12-08 03:22:58 +0000 |
| commit | bc6df23d1457c9c5e9616f737659d68d7fef6e50 (patch) | |
| tree | 939e443924f25f220bb46be291d4b15852230d73 /sim/testsuite/d10v-elf/ChangeLog | |
| parent | 0a5875fc63c256f0daa9db6ed9a35257ab3db247 (diff) | |
| download | gdb-bc6df23d1457c9c5e9616f737659d68d7fef6e50.zip gdb-bc6df23d1457c9c5e9616f737659d68d7fef6e50.tar.gz gdb-bc6df23d1457c9c5e9616f737659d68d7fef6e50.tar.bz2 | |
For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: Stepping
through an exception may not work correctly.
For GDB reads/writes to the control registers, ensure the cpu state is
updated correctly.
Diffstat (limited to 'sim/testsuite/d10v-elf/ChangeLog')
| -rw-r--r-- | sim/testsuite/d10v-elf/ChangeLog | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/sim/testsuite/d10v-elf/ChangeLog b/sim/testsuite/d10v-elf/ChangeLog index 59e1d7e..c76a7b2 100644 --- a/sim/testsuite/d10v-elf/ChangeLog +++ b/sim/testsuite/d10v-elf/ChangeLog @@ -1,3 +1,10 @@ +Fri Dec 5 10:11:18 1997 Andrew Cagney <cagney@b1.cygnus.com> + + * t-mvtc.s: Check for stuck-zero in MOD_E, MOD_S. + + * t-trap.s: New file. + * Makefile.in (TESTS): Update. + Thu Dec 4 16:56:55 1997 Andrew Cagney <cagney@b1.cygnus.com> * t-macros.i: Add definitions for PSW bits. |