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authorMichael Snyder <msnyder@vmware.com>2004-01-10 00:43:28 +0000
committerMichael Snyder <msnyder@vmware.com>2004-01-10 00:43:28 +0000
commit87acb4a7d15c490de7cde8f75463e70b963fa414 (patch)
tree35ee44a9954ce8db4cee30fadc4c50ad1677d738 /sim/sh
parent29ff87c56135eb9d2388c4696af3bd2bf8f65f55 (diff)
downloadgdb-87acb4a7d15c490de7cde8f75463e70b963fa414.zip
gdb-87acb4a7d15c490de7cde8f75463e70b963fa414.tar.gz
gdb-87acb4a7d15c490de7cde8f75463e70b963fa414.tar.bz2
2004-01-07 Michael Snyder <msnyder@redhat.com>
* gencode.c: Whitespace cleanup. * interp.c: Ditto.
Diffstat (limited to 'sim/sh')
-rw-r--r--sim/sh/ChangeLog3
-rw-r--r--sim/sh/gencode.c138
-rw-r--r--sim/sh/interp.c115
3 files changed, 134 insertions, 122 deletions
diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog
index e8afeb6..9659f95 100644
--- a/sim/sh/ChangeLog
+++ b/sim/sh/ChangeLog
@@ -1,5 +1,8 @@
2004-01-07 Michael Snyder <msnyder@redhat.com>
+ * gencode.c: Whitespace cleanup.
+ * interp.c: Ditto.
+
* gencode.c: Replace 'Hitachi' with 'Renesas'.
(op tab): Add new instructions for sh4a, DBR, SBR.
(expand_opcode): Add handling for new movxy combinations.
diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c
index 9a139da..52e611f 100644
--- a/sim/sh/gencode.c
+++ b/sim/sh/gencode.c
@@ -49,7 +49,7 @@ op tab[] =
{
{ "n", "", "add #<imm>,<REG_N>", "0111nnnni8*1....",
- "R[n] += SEXT(i);",
+ "R[n] += SEXT (i);",
"if (i == 0) {",
" UNDEF(n); /* see #ifdef PARANOID */",
" break;",
@@ -85,7 +85,7 @@ op tab[] =
{ "", "", "bf <bdisp8>", "10001011i8p1....",
"if (!T) {",
- " SET_NIP (PC + 4 + (SEXT(i) * 2));",
+ " SET_NIP (PC + 4 + (SEXT (i) * 2));",
" cycles += 2;",
"}",
},
@@ -235,7 +235,7 @@ op tab[] =
/* sh2e */
{ "", "", "fabs <FREG_N>", "1111nnnn01011101",
"FP_UNARY (n, fabs);",
- "/* FIXME: FR(n) &= 0x7fffffff; */",
+ "/* FIXME: FR (n) &= 0x7fffffff; */",
},
/* sh2e */
@@ -263,7 +263,7 @@ op tab[] =
" int i;",
" float f;",
" } u;",
- " u.f = DR(n);",
+ " u.f = DR (n);",
" FPUL = u.i;",
"}",
},
@@ -280,7 +280,7 @@ op tab[] =
" float f;",
" } u;",
" u.i = FPUL;",
- " SET_DR(n, u.f);",
+ " SET_DR (n, u.f);",
"}",
},
@@ -308,13 +308,13 @@ op tab[] =
/* sh2e */
{ "", "", "fldi0 <FREG_N>", "1111nnnn10001101",
- "SET_FR (n, (float)0.0);",
+ "SET_FR (n, (float) 0.0);",
"/* FIXME: check for DP and (n & 1) == 0? */",
},
/* sh2e */
{ "", "", "fldi1 <FREG_N>", "1111nnnn10011101",
- "SET_FR (n, (float)1.0);",
+ "SET_FR (n, (float) 1.0);",
"/* FIXME: check for DP and (n & 1) == 0? */",
},
@@ -325,7 +325,7 @@ op tab[] =
" int i;",
" float f;",
" } u;",
- " u.f = FR(n);",
+ " u.f = FR (n);",
" FPUL = u.i;",
},
@@ -333,16 +333,16 @@ op tab[] =
{ "", "", "float FPUL,<FREG_N>", "1111nnnn00101101",
/* sh4 */
"if (FPSCR_PR)",
- " SET_DR (n, (double)FPUL);",
+ " SET_DR (n, (double) FPUL);",
"else",
"{",
- " SET_FR (n, (float)FPUL);",
+ " SET_FR (n, (float) FPUL);",
"}",
},
/* sh2e */
{ "", "", "fmac <FREG_0>,<FREG_M>,<FREG_N>", "1111nnnnmmmm1110",
- "SET_FR (n, FR(m) * FR(0) + FR(n));",
+ "SET_FR (n, FR (m) * FR (0) + FR (n));",
"/* FIXME: check for DP and (n & 1) == 0? */",
},
@@ -370,7 +370,7 @@ op tab[] =
"else",
"{",
" MA (1);",
- " WLAT (R[n], FI(m));",
+ " WLAT (R[n], FI (m));",
"}",
},
/* sh2e */
@@ -383,7 +383,7 @@ op tab[] =
"else",
"{",
" MA (1);",
- " SET_FI(n, RLAT(R[m]));",
+ " SET_FI (n, RLAT (R[m]));",
"}",
},
/* sh2e */
@@ -413,7 +413,7 @@ op tab[] =
"{",
" MA (1);",
" R[n] -= 4;",
- " WLAT (R[n], FI(m));",
+ " WLAT (R[n], FI (m));",
"}",
},
/* sh2e */
@@ -426,7 +426,7 @@ op tab[] =
"else",
"{",
" MA (1);",
- " SET_FI(n, RLAT(R[0] + R[m]));",
+ " SET_FI (n, RLAT (R[0] + R[m]));",
"}",
},
/* sh2e */
@@ -439,7 +439,7 @@ op tab[] =
"else",
"{",
" MA (1);",
- " WLAT((R[0]+R[n]), FI(m));",
+ " WLAT ((R[0]+R[n]), FI (m));",
"}",
},
@@ -447,17 +447,17 @@ op tab[] =
/* sh2e */
{ "", "", "fmul <FREG_M>,<FREG_N>", "1111nnnnmmmm0010",
- "FP_OP(n, *, m);",
+ "FP_OP (n, *, m);",
},
/* sh2e */
{ "", "", "fneg <FREG_N>", "1111nnnn01001101",
- "FP_UNARY(n, -);",
+ "FP_UNARY (n, -);",
},
/* sh4a */
{ "", "", "fpchg", "1111011111111101",
- "SET_FPSCR (GET_FPSCR() ^ FPSCR_MASK_PR);",
+ "SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_PR);",
},
/* sh4 */
@@ -465,7 +465,7 @@ op tab[] =
"if (FPSCR_PR)",
" RAISE_EXCEPTION (SIGILL);",
"else",
- " SET_FPSCR (GET_FPSCR() ^ FPSCR_MASK_FR);",
+ " SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_FR);",
},
/* sh4 */
@@ -481,12 +481,12 @@ op tab[] =
/* sh4 */
{ "", "", "fschg", "1111001111111101",
- "SET_FPSCR (GET_FPSCR() ^ FPSCR_MASK_SZ);",
+ "SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_SZ);",
},
/* sh3e */
{ "", "", "fsqrt <FREG_N>", "1111nnnn01101101",
- "FP_UNARY(n, sqrt);",
+ "FP_UNARY (n, sqrt);",
},
/* sh4 */
@@ -499,23 +499,23 @@ op tab[] =
/* sh2e */
{ "", "", "fsub <FREG_M>,<FREG_N>", "1111nnnnmmmm0001",
- "FP_OP(n, -, m);",
+ "FP_OP (n, -, m);",
},
/* sh2e */
{ "", "", "ftrc <FREG_N>, FPUL", "1111nnnn00111101",
/* sh4 */
"if (FPSCR_PR) {",
- " if (DR(n) != DR(n)) /* NaN */",
+ " if (DR (n) != DR (n)) /* NaN */",
" FPUL = 0x80000000;",
" else",
- " FPUL = (int)DR(n);",
+ " FPUL = (int) DR (n);",
"}",
"else",
- "if (FR(n) != FR(n)) /* NaN */",
+ "if (FR (n) != FR (n)) /* NaN */",
" FPUL = 0x80000000;",
"else",
- " FPUL = (int)FR(n);",
+ " FPUL = (int) FR (n);",
},
/* sh4 */
@@ -643,17 +643,17 @@ op tab[] =
},
{ "n", "n", "lds.l @<REG_N>+,<SREG_M>", "0100nnnnssss0110",
"MA (1);",
- "SREG (m) = RLAT(R[n]);",
+ "SREG (m) = RLAT (R[n]);",
"R[n] += 4;",
},
/* sh2e / sh-dsp (lds <REG_N>,DSR) */
{ "", "n", "lds <REG_N>,FPSCR", "0100nnnn01101010",
- "SET_FPSCR(R[n]);",
+ "SET_FPSCR (R[n]);",
},
/* sh2e / sh-dsp (lds.l @<REG_N>+,DSR) */
{ "n", "n", "lds.l @<REG_N>+,FPSCR", "0100nnnn01100110",
"MA (1);",
- "SET_FPSCR (RLAT(R[n]));",
+ "SET_FPSCR (RLAT (R[n]));",
"R[n] += 4;",
},
@@ -662,15 +662,15 @@ op tab[] =
},
{ "nm", "nm", "mac.l @<REG_M>+,@<REG_N>+", "0000nnnnmmmm1111",
- "macl(&R0,memory,n,m);",
+ "macl (&R0,memory,n,m);",
},
{ "nm", "nm", "mac.w @<REG_M>+,@<REG_N>+", "0100nnnnmmmm1111",
- "macw(&R0,memory,n,m,endianw);",
+ "macw (&R0,memory,n,m,endianw);",
},
{ "n", "", "mov #<imm>,<REG_N>", "1110nnnni8*1....",
- "R[n] = SEXT(i);",
+ "R[n] = SEXT (i);",
},
{ "n", "m", "mov <REG_M>,<REG_N>", "0110nnnnmmmm0011",
"R[n] = R[m];",
@@ -890,13 +890,13 @@ op tab[] =
/* muls.w - see muls */
{ "", "mn", "muls <REG_M>,<REG_N>", "0010nnnnmmmm1111",
- "MACL = ((int)(short)R[n]) * ((int)(short)R[m]);",
+ "MACL = ((int) (short) R[n]) * ((int) (short) R[m]);",
},
/* mulu.w - see mulu */
{ "", "mn", "mulu <REG_M>,<REG_N>", "0010nnnnmmmm1110",
- "MACL = (((unsigned int)(unsigned short)R[n])",
- " * ((unsigned int)(unsigned short)R[m]));",
+ "MACL = (((unsigned int) (unsigned short) R[n])",
+ " * ((unsigned int) (unsigned short) R[m]));",
},
{ "n", "m", "neg <REG_M>,<REG_N>", "0110nnnnmmmm1011",
@@ -1184,9 +1184,9 @@ op tab[] =
{ "", "n", "tas.b @<REG_N>", "0100nnnn00011011",
"MA (1);",
- "ult = RBAT(R[n]);",
+ "ult = RBAT (R[n]);",
"SET_SR_T (ult == 0);",
- "WBAT(R[n],ult|0x80);",
+ "WBAT (R[n],ult|0x80);",
},
{ "0", "", "trapa #<imm>", "11000011i8*1....",
@@ -1196,15 +1196,15 @@ op tab[] =
#if 0
"else {",
/* SH-[12] */
- " R[15]-=4;",
- " WLAT (R[15], GET_SR());",
- " R[15]-=4;",
+ " R[15] -= 4;",
+ " WLAT (R[15], GET_SR ());",
+ " R[15] -= 4;",
" WLAT (R[15], PH2T (PC + 2));",
#else
"else if (!SR_BL) {",
- " SSR = GET_SR();",
+ " SSR = GET_SR ();",
" SPC = PH2T (PC + 2);",
- " SET_SR (GET_SR() | SR_MASK_MD | SR_MASK_BL | SR_MASK_RB);",
+ " SET_SR (GET_SR () | SR_MASK_MD | SR_MASK_BL | SR_MASK_RB);",
" /* FIXME: EXPEVT = 0x00000160; */",
#endif
" SET_NIP (PT2H (RLAT (VBR + (imm<<2))));",
@@ -1242,10 +1242,10 @@ op tab[] =
#if 0
{ "divs.l <REG_M>,<REG_N>", "0100nnnnmmmm1110",
- "divl(0,R[n],R[m]);",
+ "divl (0,R[n],R[m]);",
},
{ "divu.l <REG_M>,<REG_N>", "0100nnnnmmmm1101",
- "divl(0,R[n],R[m]);",
+ "divl (0,R[n],R[m]);",
},
#endif
@@ -2619,10 +2619,10 @@ gensim_caselist (p)
case '1':
break;
case '2':
- printf ("<<1");
+ printf (" << 1");
break;
case '4':
- printf ("<<2");
+ printf (" << 2");
break;
}
printf (";\n");
@@ -2631,27 +2631,27 @@ gensim_caselist (p)
}
if (sextbit > 0)
{
- printf (" i = (i ^ (1<<%d))-(1<<%d);\n",
+ printf (" i = (i ^ (1 << %d)) - (1 << %d);\n",
sextbit - 1, sextbit - 1);
}
if (needm && needn)
- printf (" TB(m,n);\n");
+ printf (" TB (m,n);\n");
else if (needm)
- printf (" TL(m);\n");
+ printf (" TL (m);\n");
else if (needn)
- printf (" TL(n);\n");
+ printf (" TL (n);\n");
{
/* Do the refs */
char *r;
for (r = p->refs; *r; r++)
{
- if (*r == '0') printf(" CREF(0);\n");
- if (*r == '8') printf(" CREF(8);\n");
- if (*r == '9') printf(" CREF(9);\n");
- if (*r == 'n') printf(" CREF(n);\n");
- if (*r == 'm') printf(" CREF(m);\n");
+ if (*r == '0') printf (" CREF (0);\n");
+ if (*r == '8') printf (" CREF (8);\n");
+ if (*r == '9') printf (" CREF (9);\n");
+ if (*r == 'n') printf (" CREF (n);\n");
+ if (*r == 'm') printf (" CREF (m);\n");
}
}
@@ -2670,9 +2670,9 @@ gensim_caselist (p)
char *r;
for (r = p->defs; *r; r++)
{
- if (*r == '0') printf(" CDEF(0);\n");
- if (*r == 'n') printf(" CDEF(n);\n");
- if (*r == 'm') printf(" CDEF(m);\n");
+ if (*r == '0') printf(" CDEF (0);\n");
+ if (*r == 'n') printf(" CDEF (n);\n");
+ if (*r == 'm') printf(" CDEF (m);\n");
}
}
@@ -2720,22 +2720,26 @@ gendefines ()
char *s = p->name;
printf ("#define OPC_");
while (*s) {
- if (isupper(*s))
- *s = tolower(*s);
- if (isalpha(*s)) printf("%c", *s);
- if (*s == ' ') printf("_");
- if (*s == '@') printf("ind_");
- if (*s == ',') printf("_");
+ if (isupper (*s))
+ *s = tolower (*s);
+ if (isalpha (*s))
+ printf ("%c", *s);
+ if (*s == ' ')
+ printf ("_");
+ if (*s == '@')
+ printf ("ind_");
+ if (*s == ',')
+ printf ("_");
s++;
}
- printf(" %d\n",p->index);
+ printf (" %d\n",p->index);
}
}
static int ppi_index;
/* Take a ppi code, expand all varying fields in it and fill all the
- right entries in 'table' with the opcode index.
+ right entries in 'table' with the opcode index.
NOTE: tail recursion optimization removed for simplicity. */
static void
diff --git a/sim/sh/interp.c b/sim/sh/interp.c
index 2bbb690..9810678 100644
--- a/sim/sh/interp.c
+++ b/sim/sh/interp.c
@@ -183,9 +183,9 @@ static char *myname;
#define R0 saved_state.asregs.regs[0]
#define Rn saved_state.asregs.regs[n]
#define Rm saved_state.asregs.regs[m]
-#define UR0 (unsigned int)(saved_state.asregs.regs[0])
-#define UR (unsigned int)R
-#define UR (unsigned int)R
+#define UR0 (unsigned int) (saved_state.asregs.regs[0])
+#define UR (unsigned int) R
+#define UR (unsigned int) R
#define SR0 saved_state.asregs.regs[0]
#define CREG(n) (saved_state.asregs.cregs.i[(n)])
#define GBR saved_state.asregs.cregs.named.gbr
@@ -270,9 +270,9 @@ do { \
#define FPSCR_MASK_SZ (1 << 20)
#define FPSCR_MASK_PR (1 << 19)
-#define FPSCR_FR ((GET_FPSCR() & FPSCR_MASK_FR) != 0)
-#define FPSCR_SZ ((GET_FPSCR() & FPSCR_MASK_SZ) != 0)
-#define FPSCR_PR ((GET_FPSCR() & FPSCR_MASK_PR) != 0)
+#define FPSCR_FR ((GET_FPSCR () & FPSCR_MASK_FR) != 0)
+#define FPSCR_SZ ((GET_FPSCR () & FPSCR_MASK_SZ) != 0)
+#define FPSCR_PR ((GET_FPSCR () & FPSCR_MASK_PR) != 0)
/* Count the number of arguments in an argv. */
static int
@@ -330,7 +330,7 @@ void
raise_exception (x)
int x;
{
- RAISE_EXCEPTION(x);
+ RAISE_EXCEPTION (x);
}
void
@@ -405,7 +405,7 @@ do { \
#ifdef PARANOID
int valid[16];
-#define CREF(x) if(!valid[x]) fail();
+#define CREF(x) if (!valid[x]) fail ();
#define CDEF(x) valid[x] = 1;
#define UNDEF(x) valid[x] = 0;
#else
@@ -416,14 +416,14 @@ int valid[16];
static void parse_and_set_memory_size PARAMS ((char *str));
static int IOMEM PARAMS ((int addr, int write, int value));
-static struct loop_bounds get_loop_bounds PARAMS((int, int, unsigned char *,
- unsigned char *, int, int));
-static void process_wlat_addr PARAMS((int, int));
-static void process_wwat_addr PARAMS((int, int));
-static void process_wbat_addr PARAMS((int, int));
-static int process_rlat_addr PARAMS((int));
-static int process_rwat_addr PARAMS((int));
-static int process_rbat_addr PARAMS((int));
+static struct loop_bounds get_loop_bounds PARAMS ((int, int, unsigned char *,
+ unsigned char *, int, int));
+static void process_wlat_addr PARAMS ((int, int));
+static void process_wwat_addr PARAMS ((int, int));
+static void process_wbat_addr PARAMS ((int, int));
+static int process_rlat_addr PARAMS ((int));
+static int process_rwat_addr PARAMS ((int));
+static int process_rbat_addr PARAMS ((int));
static void INLINE wlat_fast PARAMS ((unsigned char *, int, int, int));
static void INLINE wwat_fast PARAMS ((unsigned char *, int, int, int, int));
static void INLINE wbat_fast PARAMS ((unsigned char *, int, int, int));
@@ -522,10 +522,10 @@ set_dr (n, exp)
if (((n) & 1) || ((m) & 1)) \
RAISE_EXCEPTION (SIGILL); \
else \
- SET_DR(n, (DR(n) OP DR(m))); \
+ SET_DR (n, (DR (n) OP DR (m))); \
} \
else \
- SET_FR(n, (FR(n) OP FR(m))); \
+ SET_FR (n, (FR (n) OP FR (m))); \
} while (0)
#define FP_UNARY(n, OP) \
@@ -535,10 +535,10 @@ set_dr (n, exp)
if ((n) & 1) \
RAISE_EXCEPTION (SIGILL); \
else \
- SET_DR(n, (OP (DR(n)))); \
+ SET_DR (n, (OP (DR (n)))); \
} \
else \
- SET_FR(n, (OP (FR(n)))); \
+ SET_FR (n, (OP (FR (n)))); \
} while (0)
#define FP_CMP(n, OP, m) \
@@ -548,10 +548,10 @@ set_dr (n, exp)
if (((n) & 1) || ((m) & 1)) \
RAISE_EXCEPTION (SIGILL); \
else \
- SET_SR_T (DR(n) OP DR(m)); \
+ SET_SR_T (DR (n) OP DR (m)); \
} \
else \
- SET_SR_T (FR(n) OP FR(m)); \
+ SET_SR_T (FR (n) OP FR (m)); \
} while (0)
static void
@@ -580,7 +580,7 @@ wlat_fast (memory, x, value, maskl)
unsigned char *memory;
{
int v = value;
- unsigned int *p = (unsigned int *)(memory + x);
+ unsigned int *p = (unsigned int *) (memory + x);
WRITE_BUSERROR (x, maskl, v, process_wlat_addr);
*p = v;
}
@@ -590,7 +590,7 @@ wwat_fast (memory, x, value, maskw, endianw)
unsigned char *memory;
{
int v = value;
- unsigned short *p = (unsigned short *)(memory + (x ^ endianw));
+ unsigned short *p = (unsigned short *) (memory + (x ^ endianw));
WRITE_BUSERROR (x, maskw, v, process_wwat_addr);
*p = v;
}
@@ -611,7 +611,7 @@ static int INLINE
rlat_fast (memory, x, maskl)
unsigned char *memory;
{
- unsigned int *p = (unsigned int *)(memory + x);
+ unsigned int *p = (unsigned int *) (memory + x);
READ_BUSERROR (x, maskl, process_rlat_addr);
return *p;
@@ -622,7 +622,7 @@ rwat_fast (memory, x, maskw, endianw)
unsigned char *memory;
int x, maskw, endianw;
{
- unsigned short *p = (unsigned short *)(memory + (x ^ endianw));
+ unsigned short *p = (unsigned short *) (memory + (x ^ endianw));
READ_BUSERROR (x, maskw, process_rwat_addr);
return *p;
@@ -632,7 +632,7 @@ static int INLINE
riat_fast (insn_ptr, endianw)
unsigned char *insn_ptr;
{
- unsigned short *p = (unsigned short *)((size_t) insn_ptr ^ endianw);
+ unsigned short *p = (unsigned short *) ((size_t) insn_ptr ^ endianw);
return *p;
}
@@ -655,10 +655,10 @@ rbat_fast (memory, x, maskb)
#define WLAT(x,v) (wlat_fast (memory, x, v, maskl))
#define WBAT(x,v) (wbat_fast (memory, x, v, maskb))
-#define RUWAT(x) (RWAT(x) & 0xffff)
-#define RSWAT(x) ((short)(RWAT(x)))
-#define RSLAT(x) ((long)(RLAT(x)))
-#define RSBAT(x) (SEXT(RBAT(x)))
+#define RUWAT(x) (RWAT (x) & 0xffff)
+#define RSWAT(x) ((short) (RWAT (x)))
+#define RSLAT(x) ((long) (RLAT (x)))
+#define RSBAT(x) (SEXT (RBAT (x)))
#define RDAT(x, n) (do_rdat (memory, (x), (n), (maskl)))
static int
@@ -763,11 +763,11 @@ process_rbat_addr (addr)
#define SEXT(x) (((x & 0xff) ^ (~0x7f))+0x80)
#define SEXT12(x) (((x & 0xfff) ^ 0x800) - 0x800)
-#define SEXTW(y) ((int)((short)y))
+#define SEXTW(y) ((int) ((short) y))
#if 0
-#define SEXT32(x) ((int)((x & 0xffffffff) ^ 0x80000000U) - 0x7fffffff - 1)
+#define SEXT32(x) ((int) ((x & 0xffffffff) ^ 0x80000000U) - 0x7fffffff - 1)
#else
-#define SEXT32(x) ((int)(x))
+#define SEXT32(x) ((int) (x))
#endif
#define SIGN32(x) (SEXT32 (x) >> 31)
@@ -806,7 +806,7 @@ do { \
#define L(x) thislock = x;
#define TL(x) if ((x) == prevlock) stalls++;
-#define TB(x,y) if ((x) == prevlock || (y)==prevlock) stalls++;
+#define TB(x,y) if ((x) == prevlock || (y) == prevlock) stalls++;
#endif
@@ -1004,10 +1004,11 @@ trap (i, regs, insn_ptr, memory, maskl, maskw, endianw)
Besides, it's quite dangerous. */
#if 0
case SYS_execve:
- regs[0] = execve (ptr (regs[5]), (char **)ptr (regs[6]), (char **)ptr (regs[7]));
+ regs[0] = execve (ptr (regs[5]), (char **) ptr (regs[6]),
+ (char **) ptr (regs[7]));
break;
case SYS_execv:
- regs[0] = execve (ptr (regs[5]),(char **) ptr (regs[6]), 0);
+ regs[0] = execve (ptr (regs[5]), (char **) ptr (regs[6]), 0);
break;
#endif
case SYS_pipe:
@@ -1032,9 +1033,11 @@ trap (i, regs, insn_ptr, memory, maskl, maskw, endianw)
case SYS_write:
strnswap (regs[6], regs[7]);
if (regs[5] == 1)
- regs[0] = (int)callback->write_stdout (callback, ptr(regs[6]), regs[7]);
+ regs[0] = (int) callback->write_stdout (callback,
+ ptr (regs[6]), regs[7]);
else
- regs[0] = (int)callback->write (callback, regs[5], ptr (regs[6]), regs[7]);
+ regs[0] = (int) callback->write (callback, regs[5],
+ ptr (regs[6]), regs[7]);
strnswap (regs[6], regs[7]);
break;
case SYS_lseek:
@@ -1047,7 +1050,7 @@ trap (i, regs, insn_ptr, memory, maskl, maskw, endianw)
{
int len = strswaplen (regs[5]);
strnswap (regs[5], len);
- regs[0] = callback->open (callback,ptr (regs[5]), regs[6]);
+ regs[0] = callback->open (callback, ptr (regs[5]), regs[6]);
strnswap (regs[5], len);
break;
}
@@ -1338,11 +1341,11 @@ macw (regs, memory, n, m, endianw)
long tempm, tempn;
long prod, macl, sum;
- tempm=RSWAT(regs[m]); regs[m]+=2;
- tempn=RSWAT(regs[n]); regs[n]+=2;
+ tempm=RSWAT (regs[m]); regs[m]+=2;
+ tempn=RSWAT (regs[n]); regs[n]+=2;
macl = MACL;
- prod = (long)(short) tempm * (long)(short) tempn;
+ prod = (long) (short) tempm * (long) (short) tempn;
sum = prod + macl;
if (S)
{
@@ -1382,10 +1385,10 @@ macl (regs, memory, n, m)
long long m64; /* 64 bit MAC */
}mac64;
- tempm = RSLAT(regs[m]);
+ tempm = RSLAT (regs[m]);
regs[m] += 4;
- tempn = RSLAT(regs[n]);
+ tempn = RSLAT (regs[n]);
regs[n] += 4;
mach = MACH;
@@ -1394,7 +1397,7 @@ macl (regs, memory, n, m)
mac64.m[0] = macl;
mac64.m[1] = mach;
- ans = (long long)tempm * (long long)tempn; /* Multiply 32bit * 32bit */
+ ans = (long long) tempm * (long long) tempn; /* Multiply 32bit * 32bit */
mac64.m64 += ans; /* Accumulate 64bit + 64 bit */
@@ -1477,7 +1480,7 @@ fsrra_s (float in)
architectural spec. */
frac = frexp (result, &exp);
frac = ldexp (frac, 24);
- error = 4.; /* 1 << 24-1-21 */
+ error = 4.0; /* 1 << 24-1-21 */
/* use eps to compensate for possible 1 ulp error in our 'exact' result. */
eps = ldexp (1., -29);
upper = floor (frac + error - eps);
@@ -1530,8 +1533,7 @@ get_loop_bounds (rs, re, memory, mem_end, maskw, endianw)
return loop;
}
-static void
-ppi_insn();
+static void ppi_insn ();
#include "ppi.c"
@@ -1657,7 +1659,7 @@ static void
init_pointers ()
{
host_little_endian = 0;
- *(char*)&host_little_endian = 1;
+ * (char*) &host_little_endian = 1;
host_little_endian &= 1;
if (saved_state.asregs.msize != 1 << sim_memory_size)
@@ -1948,7 +1950,7 @@ sim_store_register (sd, rn, memory, length)
unsigned val;
init_pointers ();
- val = swap (* (int *)memory);
+ val = swap (* (int *) memory);
switch (rn)
{
case SIM_SH_R0_REGNUM: case SIM_SH_R1_REGNUM: case SIM_SH_R2_REGNUM:
@@ -2240,7 +2242,8 @@ sim_info (sd, verbose)
SIM_DESC sd;
int verbose;
{
- double timetaken = (double) saved_state.asregs.ticks / (double) now_persec ();
+ double timetaken =
+ (double) saved_state.asregs.ticks / (double) now_persec ();
double virttime = saved_state.asregs.cycles / 36.0e6;
callback->printf_filtered (callback, "\n\n# instructions executed %10d\n",
@@ -2394,7 +2397,7 @@ sim_create_inferior (sd, prog_bfd, argv, env)
{
/* Clear the registers. */
memset (&saved_state, 0,
- (char*)&saved_state.asregs.end_of_registers - (char*)&saved_state);
+ (char*) &saved_state.asregs.end_of_registers - (char*) &saved_state);
/* Set the PC. */
if (prog_bfd != NULL)
@@ -2420,13 +2423,15 @@ sim_do_command (sd, cmd)
}
cmdsize = strlen (sms_cmd);
- if (strncmp (cmd, sms_cmd, cmdsize) == 0 && strchr (" \t", cmd[cmdsize]) != NULL)
+ if (strncmp (cmd, sms_cmd, cmdsize) == 0
+ && strchr (" \t", cmd[cmdsize]) != NULL)
{
parse_and_set_memory_size (cmd + cmdsize + 1);
}
else if (strcmp (cmd, "help") == 0)
{
- (callback->printf_filtered) (callback, "List of SH simulator commands:\n\n");
+ (callback->printf_filtered) (callback,
+ "List of SH simulator commands:\n\n");
(callback->printf_filtered) (callback, "set-memory-size <n> -- Set the number of address bits to use\n");
(callback->printf_filtered) (callback, "\n");
}