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author | Michael Snyder <msnyder@vmware.com> | 2003-07-23 21:14:54 +0000 |
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committer | Michael Snyder <msnyder@vmware.com> | 2003-07-23 21:14:54 +0000 |
commit | 15dee5d56138cdd48dc3f6b8c8e1d610b0131aa1 (patch) | |
tree | 5c6d43daeadf930fac0963120a25ba53ab6dfea9 /sim/sh/gencode.c | |
parent | 586b12adb4bd060c91a398806bf1ce17f6ef09df (diff) | |
download | gdb-15dee5d56138cdd48dc3f6b8c8e1d610b0131aa1.zip gdb-15dee5d56138cdd48dc3f6b8c8e1d610b0131aa1.tar.gz gdb-15dee5d56138cdd48dc3f6b8c8e1d610b0131aa1.tar.bz2 |
2003-06-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (gensim_caselist): The movy instructions use
registers R6 and R7 (not R4 and R5 like the movx insns).
Diffstat (limited to 'sim/sh/gencode.c')
-rw-r--r-- | sim/sh/gencode.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c index a0f8b59..e5dee8f 100644 --- a/sim/sh/gencode.c +++ b/sim/sh/gencode.c @@ -2159,7 +2159,7 @@ gensim_caselist (p) s += 2; break; case 'y': - printf (" int n = ((iword >> 8) & 1) + 4;\n"); + printf (" int n = ((iword >> 8) & 1) + 6;\n"); needn = 1; s += 2; break; |