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| author | Jeff Law <law@redhat.com> | 1995-08-31 04:21:32 +0000 |
|---|---|---|
| committer | Jeff Law <law@redhat.com> | 1995-08-31 04:21:32 +0000 |
| commit | c1bce9f662c8472a33a83821bbeb7fc86ec252d4 (patch) | |
| tree | effab746489c1c1e77fa564733c913467dbc4c7f /sim/sh/ChangeLog | |
| parent | c928c81fb72df4dade3b36935a8e05d3ad58440d (diff) | |
| download | gdb-c1bce9f662c8472a33a83821bbeb7fc86ec252d4.zip gdb-c1bce9f662c8472a33a83821bbeb7fc86ec252d4.tar.gz gdb-c1bce9f662c8472a33a83821bbeb7fc86ec252d4.tar.bz2 | |
* interp.c (FPSCR, FPUL): Define.
(struct save_state): Add fields for floating point registers,
FPSCR and FPUL.
(sim_resume): Add 'F' for accessing floating point registers
in the save state structure.
* gencode.c: Add sh3e opcodes.
(gensym): Define a buffer for int<->fp conversions.
First cut at simulating sh3e instructions. Basic stuff should work;
instructions using fpul and fpscr are completely untested... Sanitized
away for now (sh3e).
Diffstat (limited to 'sim/sh/ChangeLog')
| -rw-r--r-- | sim/sh/ChangeLog | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog index 8fecfab..82c8a0e 100644 --- a/sim/sh/ChangeLog +++ b/sim/sh/ChangeLog @@ -1,6 +1,15 @@ Wed Aug 30 22:05:17 1995 Jeff Law (law@snake.cs.utah.edu) * gencode.c (gensim): abort if an unknown opcode is encountered. +start-sanitize-sh3e + * interp.c (FPSCR, FPUL): Define. + (struct save_state): Add fields for floating point registers, + FPSCR and FPUL. + (sim_resume): Add 'F' for accessing floating point registers + in the save state structure. + * gencode.c: Add sh3e opcodes. + (gensym): Define a buffer for int<->fp conversions. +end-sanitize-sh3e Tue Aug 22 14:16:46 1995 J.T. Conklin <jtc@rtl.cygnus.com> |