aboutsummaryrefslogtreecommitdiff
path: root/sim/sh/ChangeLog
diff options
context:
space:
mode:
authorMichael Snyder <msnyder@vmware.com>2003-07-23 21:23:32 +0000
committerMichael Snyder <msnyder@vmware.com>2003-07-23 21:23:32 +0000
commitd2f18ae42afc58479c4cbfcc5e9a790b42858f60 (patch)
tree9f507dc8f84267fd76211329bf72f6d25f058c03 /sim/sh/ChangeLog
parent63858210357ce3f90a264895e9780ab302576a94 (diff)
downloadgdb-d2f18ae42afc58479c4cbfcc5e9a790b42858f60.zip
gdb-d2f18ae42afc58479c4cbfcc5e9a790b42858f60.tar.gz
gdb-d2f18ae42afc58479c4cbfcc5e9a790b42858f60.tar.bz2
2003-06-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (op tab): Implement movca.l.
Diffstat (limited to 'sim/sh/ChangeLog')
-rw-r--r--sim/sh/ChangeLog1
1 files changed, 1 insertions, 0 deletions
diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog
index ad4bd8f..2b6624d 100644
--- a/sim/sh/ChangeLog
+++ b/sim/sh/ChangeLog
@@ -4,6 +4,7 @@
2003-06-27 Michael Snyder <msnyder@redhat.com>
+ * gencode.c (op tab): Implement movca.l.
* gencode.c (op movsxy_tab): Fix an error in the bit pattern.
* gencode.c (gensim_caselist): The movy instructions use
registers R6 and R7 (not R4 and R5 like the movx insns).