aboutsummaryrefslogtreecommitdiff
path: root/sim/rx/reg.c
diff options
context:
space:
mode:
authorDJ Delorie <dj@redhat.com>2010-07-28 21:58:22 +0000
committerDJ Delorie <dj@redhat.com>2010-07-28 21:58:22 +0000
commit933786524e8179ddeb0a27740d9b206352f33436 (patch)
tree458cf4052f5038fecce2cac33c903ccb536b495f /sim/rx/reg.c
parentd61e002c1485f3c27a2d31971480954811caa0f0 (diff)
downloadgdb-933786524e8179ddeb0a27740d9b206352f33436.zip
gdb-933786524e8179ddeb0a27740d9b206352f33436.tar.gz
gdb-933786524e8179ddeb0a27740d9b206352f33436.tar.bz2
[sim/rx]
* README.txt: New. * config.h (CYCLE_ACCURATE, CYCLE_STATS): New. * configure.in (--enable-cycle-accurate, --enable-cycle-stats): New. Default to enabled. * configure: Regenerate. * cpu.h (regs_type): Add cycle tracking info. (reset_pipeline_stats): Declare. (halt_pipeline_stats): Declare. (pipeline_stats): Declare. * main.c (done): Call pipeline_stats(). * mem.h (rx_mem_ptr): Moved to here ... * mem.c (mem_ptr): ... from here. Rename throughout. (mem_put_byte): Move LEDs to Port A. Add Port B to control cycle statistics. Move UART to SCI4. (mem_put_hi): Add TPU 1-2. TPU 1 and 2 count CPU cycles. * reg.c (init_regs): Set Rt reg to -1 (no reg). * rx.c: Add cycle counting and statistics throughout. (rx_get_byte): Optimize for speed. (decode_opcode): Likewise. (reset_pipeline_stats): New. (halt_pipeline_stats): New. (pipeline_stats): New. * trace.c (sim_disasm_one): Print cycle count. [include/opcode] * rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
Diffstat (limited to 'sim/rx/reg.c')
-rw-r--r--sim/rx/reg.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/sim/rx/reg.c b/sim/rx/reg.c
index f635b6d..0103d21 100644
--- a/sim/rx/reg.c
+++ b/sim/rx/reg.c
@@ -19,6 +19,7 @@
along with this program. If not, see <http://www.gnu.org/licenses/>. */
+#include "config.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
@@ -67,6 +68,11 @@ init_regs (void)
{
memset (&regs, 0, sizeof (regs));
memset (&oldregs, 0, sizeof (oldregs));
+
+#ifdef CYCLE_ACCURATE
+ regs.rt = -1;
+ oldregs.rt = -1;
+#endif
}
static unsigned int