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authorKevin Buettner <kevinb@redhat.com>2010-09-30 00:03:23 +0000
committerKevin Buettner <kevinb@redhat.com>2010-09-30 00:03:23 +0000
commite4dcb664155ce5754aa54b0ebc7095d780cbe2fc (patch)
tree99f4761c5e00605c1e09dd11d0c8b4db6ff9dbe8 /sim/rx/mem.c
parent6f6526358fe53ff6b4da0a689bd8f6b721c3df8a (diff)
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* mem.c (rx_mem_ptr): When invalidating the decode cache, account
for the fact that the instruction decoder never uses swapped addresses.
Diffstat (limited to 'sim/rx/mem.c')
-rw-r--r--sim/rx/mem.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/sim/rx/mem.c b/sim/rx/mem.c
index 7405518..3a976cb 100644
--- a/sim/rx/mem.c
+++ b/sim/rx/mem.c
@@ -104,13 +104,19 @@ rx_mem_ptr (unsigned long address, enum mem_ptr_action action)
if (action == MPA_WRITING)
{
+ int pto_dc;
if (ptr[pt1][pt2][pto] == MC_PUSHED_PC)
execution_error (SIM_ERR_CORRUPT_STACK, address);
ptr[pt1][pt2][pto] = MC_DATA;
- if (ptdc[pt1][pt2][pto])
+
+ /* The instruction decoder doesn't store it's decoded instructions
+ at word swapped addresses. Therefore, when clearing the decode
+ cache, we have to account for that here. */
+ pto_dc = pto ^ (rx_big_endian ? 3 : 0);
+ if (ptdc[pt1][pt2][pto_dc])
{
- free (ptdc[pt1][pt2][pto]);
- ptdc[pt1][pt2][pto] = NULL;
+ free (ptdc[pt1][pt2][pto_dc]);
+ ptdc[pt1][pt2][pto_dc] = NULL;
}
}