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authorMike Frysinger <vapier@gentoo.org>2021-06-28 22:39:16 -0400
committerMike Frysinger <vapier@gentoo.org>2021-06-30 13:33:18 -0400
commitb79efe264f9d2d4fc5b0491acd3258063b309723 (patch)
tree75808110808964a8813af7df9a5e8cf03b547dc7 /sim/riscv
parente7954ef5e5ed90fb7d28c013518f4c2e6bcd20a1 (diff)
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sim: unify scache settings
The cgen scache module is enabled by every cgen port, and with the same default value of 16k (which matches the common default value). Let's pull this option out of the individual ports (via CPPFLAGS) and into the common code (via config.h). The object itself is compiled only for cgen ports atm, so that part doesn't change. The scache code is initialized dynamically via the modules.c logic. That's why the profile code needs an additional CGEN_ARCH check. This will allow us to collapse arch configure files more. Merging the source files will require more future work, but integrating the cgen & non-cgen worlds itself will take a lot.
Diffstat (limited to 'sim/riscv')
-rw-r--r--sim/riscv/ChangeLog4
-rwxr-xr-xsim/riscv/configure2
2 files changed, 4 insertions, 2 deletions
diff --git a/sim/riscv/ChangeLog b/sim/riscv/ChangeLog
index ec4f69a..ee7246a 100644
--- a/sim/riscv/ChangeLog
+++ b/sim/riscv/ChangeLog
@@ -1,5 +1,9 @@
2021-06-30 Mike Frysinger <vapier@gentoo.org>
+ * configure: Regenerate.
+
+2021-06-30 Mike Frysinger <vapier@gentoo.org>
+
* configure.ac: Delete SIM_AC_OPTION_DEFAULT_MODEL call.
* interp.c (sim_open): Set STATE_MODEL_NAME.
* aclocal.m4: Regenerate.
diff --git a/sim/riscv/configure b/sim/riscv/configure
index c2e53cc..e366d09 100755
--- a/sim/riscv/configure
+++ b/sim/riscv/configure
@@ -587,7 +587,6 @@ LIBOBJS
SIM_COMMON_BUILD_FALSE
SIM_COMMON_BUILD_TRUE
sim_reserved_bits
-sim_scache
sim_float
cgen_breaks
target_alias
@@ -1762,7 +1761,6 @@ ac_config_commands="$ac_config_commands stamp-h"
-
SIM_COMMON_BUILD_TRUE='#'
SIM_COMMON_BUILD_FALSE=