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authorM R Swami Reddy <MR.Swami.Reddy@nsc.com>2008-05-05 09:52:46 +0000
committerM R Swami Reddy <MR.Swami.Reddy@nsc.com>2008-05-05 09:52:46 +0000
commitfae9ec8dca2e5d4da931451946f220271b5c5003 (patch)
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parente2b7ddeae30ddeb4056206b07d075e65bdf286ba (diff)
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Update testcase comment.
addb.cgs addd.cgs addi.cgs andb.cgs andd.cgs andw.cgs ashub.cgs ashub_i.cgs ashud.cgs ashud_i.cgs ashuw.cgs ashuw_i.cgs cmpi.cgs cmpw.cgs jlt.cgs jump.cgs loadd.cgs loadw.cgs lshb.cgs lshb_i.cgs lshd.cgs lshd_i.cgs lshw.cgs lshw_i.cgs movb.cgs movd.cgs movw.cgs movxb.cgs movxw.cgs movzb.cgs movzw.cgs mulb.cgs muluw.cgs mulw.cgs orb.cgs ord.cgs orw.cgs pop1.cgs pop2.cgs pop3.cgs popret1.cgs popret2.cgs popret3.cgs push1.cgs push2.cgs push3.cgs Added BIT operation testcases: cbitb.cgs cbitw.cgs sbitb.cgs sbitw.cgs tbitb.cgs tbit.cgs and tbitw.cgs
Diffstat (limited to 'sim/ppc')
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