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authorAndrew Cagney <cagney@redhat.com>2003-06-22 16:48:12 +0000
committerAndrew Cagney <cagney@redhat.com>2003-06-22 16:48:12 +0000
commit345d88d96ee2f82d2ec0d1c69cd14506b707b945 (patch)
tree77fe7fa191a6afc07968fbe9421257fb5da8c504 /sim/ppc/registers.h
parent70ecf948d924b4fdc84ba07d2f0c0ee141295ef7 (diff)
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2003-06-22 Andrew Cagney <cagney@redhat.com>
Written by matthew green <mrg@redhat.com>, with fixes from Aldy Hernandez <aldyh@redhat.com>, Jim Wilson <wilson@redhat.com>, and Nick Clifton <nickc@redhat.com>. * ppc-instructions: Include altivec.igen and e500.igen. (model_busy, model_data): Add vr_busy and vscr_busy. (model_trace_release): Trace vr_busy and vscr_busy. (model_new_cycle): Update vr_busy and vscr_busy. (model_make_busy): Update vr_busy and vscr_busy. * registers.c (register_description): Add Altivec and e500 registers. * psim.c (psim_read_register, psim_read_register): Handle Altivec and e500 registers. * ppc-spr-table (SPEFSCR): Add VRSAVE and SPEFSCR registers. * configure.in (sim_filter): When *altivec* add "av". When *spe* or *simd* add e500. (sim_float): When *altivec* define WITH_ALTIVEC. When *spe* add WITH_E500. * configure: Re-generate. * e500.igen, altivec.igen: New files. * e500_expression.h, altivec_expression.h: New files. * idecode_expression.h: Update copyright. Include "e500_expression.h" and "altivec_expression.h". * e500_registers.h, altivec_registers.h: New files. * registers.h: Update copyright. Include "e500_registers.h" and "altivec_registers.h". (registers): Add Altivec and e500 specific registers. * Makefile.in (IDECODE_H): Add "idecode_e500.h" and "idecode_altivec.h". (REGISTERS_H): Add "e500_registers.h" and "altivec_registers.h". (tmp-igen): Add dependencies on altivec.igen and e500.igen .
Diffstat (limited to 'sim/ppc/registers.h')
-rw-r--r--sim/ppc/registers.h30
1 files changed, 27 insertions, 3 deletions
diff --git a/sim/ppc/registers.h b/sim/ppc/registers.h
index 4da6ea4..15c9d43 100644
--- a/sim/ppc/registers.h
+++ b/sim/ppc/registers.h
@@ -1,6 +1,6 @@
/* This file is part of the program psim.
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
+ Copyright 1994, 1997, 2003 Andrew Cagney
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@@ -28,6 +28,19 @@
*
*/
+/* FIXME:
+
+ For the moment use macro's to determine if the E500 or Altivec
+ registers should be included. IGEN should instead of a :register:
+ field to facilitate the specification and generation of per ISA
+ registers. */
+
+#ifdef WITH_E500
+#include "e500_registers.h"
+#endif
+#if WITH_ALTIVEC
+#include "altivec_registers.h"
+#endif
/**
** General Purpose Registers
@@ -228,7 +241,6 @@ enum {
srr1_subsequent_instruction = BIT(47)
};
-
/**
** storage interrupt registers
**/
@@ -264,8 +276,14 @@ typedef struct _registers {
/* Segment Registers */
sreg sr[nr_of_srs];
-} registers;
+#if WITH_ALTIVEC
+ struct altivec_regs altivec;
+#endif
+#if WITH_E500
+ struct e500_regs e500;
+#endif
+} registers;
/* dump out all the registers */
@@ -281,6 +299,12 @@ typedef enum {
reg_gpr, reg_fpr, reg_spr, reg_msr,
reg_cr, reg_fpscr, reg_pc, reg_sr,
reg_insns, reg_stalls, reg_cycles,
+#ifdef WITH_ALTIVEC
+ reg_vr, reg_vscr,
+#endif
+#ifdef WITH_E500
+ reg_acc, reg_gprh, reg_evr,
+#endif
nr_register_types
} register_types;