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| author | Andrew Cagney <cagney@redhat.com> | 1997-02-14 19:06:08 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-02-14 19:06:08 +0000 |
| commit | cdd3120398a10c629c3eec4d9159390819e688c1 (patch) | |
| tree | 882f922776a52c93e26dbd2c69a990859069628c /sim/ppc/dc-complex | |
| parent | 1d339e4849ecadf635ab53a41a390eb513f117ae (diff) | |
| download | gdb-cdd3120398a10c629c3eec4d9159390819e688c1.zip gdb-cdd3120398a10c629c3eec4d9159390819e688c1.tar.gz gdb-cdd3120398a10c629c3eec4d9159390819e688c1.tar.bz2 | |
PR 11678 - rename long decode-rule files to shorter ones, eliminate
need for multiple almost identical decode-rule files
Diffstat (limited to 'sim/ppc/dc-complex')
| -rw-r--r-- | sim/ppc/dc-complex | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/sim/ppc/dc-complex b/sim/ppc/dc-complex new file mode 100644 index 0000000..13361ec --- /dev/null +++ b/sim/ppc/dc-complex @@ -0,0 +1,58 @@ +# +# This file is part of the program psim. +# +# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au> +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +array,normal: 0: 5: 0: 5: +array,normal: 21:31:32:-1:OE,LR,AA,Rc,LK: +## +## Branch Conditional instruction - Expand BO{0:4} only, ignore BO{5} +## +array,expand-forced: 6: 9: 6: 9:BO: 0xfc000000:0x40000000 +## +## Expand RA on equality with 0 in Add instructions were if(RA==0) appears. +## +# Add Immediate +array,boolean: 11:15:11:15:RA: 0xfc000000:0x38000000:0 +# Add Immediate Shifted +array,boolean: 11:15:11:15:RA: 0xfc000000:0x3c000000:0 +## +## Ditto for high frequency load/store instructions. +## +# Store Byte +#array,boolean: 11:15:11:15:RA: 0xfc000000:0x98000000:0 +# Store Word +#array,boolean: 11:15:11:15:RA: 0xfc000000:0x90000000:0 +# Load Word and Zero +#array,boolean: 11:15:11:15:RA: 0xfc000000:0x80000000:0 +## +## Move to/from SPR instructions - LR=8 is munged into 0x100 == 256 +## +#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:256 +#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:256 +## +## Compare Immediate instruction - separate out L == 0 and L == 1 +## +# Compare Immediate +#array,normal: 10:11:10:11:L: 0xfc000000:0x2c000000:0 +## +## Move to/from SPR instructions - separate out LR case +## +# Move to SPR +array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:256 +# Move from SPR +array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:256 |