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authorAndrew Cagney <cagney@redhat.com>2003-06-22 16:48:12 +0000
committerAndrew Cagney <cagney@redhat.com>2003-06-22 16:48:12 +0000
commit345d88d96ee2f82d2ec0d1c69cd14506b707b945 (patch)
tree77fe7fa191a6afc07968fbe9421257fb5da8c504 /sim/ppc/configure.in
parent70ecf948d924b4fdc84ba07d2f0c0ee141295ef7 (diff)
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2003-06-22 Andrew Cagney <cagney@redhat.com>
Written by matthew green <mrg@redhat.com>, with fixes from Aldy Hernandez <aldyh@redhat.com>, Jim Wilson <wilson@redhat.com>, and Nick Clifton <nickc@redhat.com>. * ppc-instructions: Include altivec.igen and e500.igen. (model_busy, model_data): Add vr_busy and vscr_busy. (model_trace_release): Trace vr_busy and vscr_busy. (model_new_cycle): Update vr_busy and vscr_busy. (model_make_busy): Update vr_busy and vscr_busy. * registers.c (register_description): Add Altivec and e500 registers. * psim.c (psim_read_register, psim_read_register): Handle Altivec and e500 registers. * ppc-spr-table (SPEFSCR): Add VRSAVE and SPEFSCR registers. * configure.in (sim_filter): When *altivec* add "av". When *spe* or *simd* add e500. (sim_float): When *altivec* define WITH_ALTIVEC. When *spe* add WITH_E500. * configure: Re-generate. * e500.igen, altivec.igen: New files. * e500_expression.h, altivec_expression.h: New files. * idecode_expression.h: Update copyright. Include "e500_expression.h" and "altivec_expression.h". * e500_registers.h, altivec_registers.h: New files. * registers.h: Update copyright. Include "e500_registers.h" and "altivec_registers.h". (registers): Add Altivec and e500 specific registers. * Makefile.in (IDECODE_H): Add "idecode_e500.h" and "idecode_altivec.h". (REGISTERS_H): Add "e500_registers.h" and "altivec_registers.h". (tmp-igen): Add dependencies on altivec.igen and e500.igen .
Diffstat (limited to 'sim/ppc/configure.in')
-rw-r--r--sim/ppc/configure.in12
1 files changed, 10 insertions, 2 deletions
diff --git a/sim/ppc/configure.in b/sim/ppc/configure.in
index e130b3a..0d7a094 100644
--- a/sim/ppc/configure.in
+++ b/sim/ppc/configure.in
@@ -190,15 +190,23 @@ fi])dnl
AC_ARG_ENABLE(sim-float,
-[ --enable-sim-float Specify whether to use host floating point or simulate.],
+[ --enable-sim-float Specify whether the target has hard, soft, altivec or e500 floating point.],
[case "${enableval}" in
yes | hard) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT";;
no | soft) sim_float="-DWITH_FLOATING_POINT=SOFT_FLOATING_POINT";;
+ altivec) sim_float="-DWITH_ALTIVEC" ; sim_filter="${sim_filter},av" ;;
+ *spe*|*simd*) sim_float="-DWITH_E500" ; sim_filter="${sim_filter},e500" ;;
*) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-float"); sim_float="";;
esac
if test x"$silent" != x"yes" && test x"$sim_float" != x""; then
echo "Setting float flags = $sim_float" 6>&1
-fi],[sim_float=""])dnl
+fi],[
+case "${target}" in
+ *altivec*) sim_float="-DWITH_ALTIVEC" ; sim_filter="${sim_filter},av" ;;
+ *spe*|*simd*) sim_float="-DWITH_E500" ; sim_filter="${sim_filter},e500" ;;
+ *) sim_float=""
+esac
+])dnl
AC_ARG_ENABLE(sim-hardware,