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author | Anthony Green <green@redhat.com> | 2009-05-01 03:03:41 +0000 |
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committer | Anthony Green <green@redhat.com> | 2009-05-01 03:03:41 +0000 |
commit | fdd6fa616728a3e9433c673e12e3ad6c1fee0e78 (patch) | |
tree | 421ef0770863b60649fb46cc9109502e9270f45c /sim/moxie/ChangeLog | |
parent | 1ec7823fec9d2fe153aebde4d4f4e906e0e80360 (diff) | |
download | gdb-fdd6fa616728a3e9433c673e12e3ad6c1fee0e78.zip gdb-fdd6fa616728a3e9433c673e12e3ad6c1fee0e78.tar.gz gdb-fdd6fa616728a3e9433c673e12e3ad6c1fee0e78.tar.bz2 |
Add moxie simulator
Diffstat (limited to 'sim/moxie/ChangeLog')
-rw-r--r-- | sim/moxie/ChangeLog | 109 |
1 files changed, 109 insertions, 0 deletions
diff --git a/sim/moxie/ChangeLog b/sim/moxie/ChangeLog new file mode 100644 index 0000000..fdad6c5 --- /dev/null +++ b/sim/moxie/ChangeLog @@ -0,0 +1,109 @@ +2008-10-03 Anthony Green <green@moxielogic.com> + + * interp.c (sim_resume): Add support for ldo.b, sto.b, ldo.s, sto.s. + +2008-09-10 Anthony Green <green@moxielogic.com> + + * interp.c (NUM_SPRO_SREGS): New. + (struct moxie_regset): Add sregs. + (set_initial_gprs): Initialize sregs. + (sim_resume): Add gsr and ssr support. + +2008-09-04 Anthony Green <green@moxielogic.com> + + * interp.c (sim_resume): Add inc and dec instructions. + +2008-09-04 Anthony Green <green@moxielogic.com> + + * interp.c (struct moxie_regset): Use an unsigned long long to keep + track of instruction trace counts. + * interp.c (sim_resume): Ditto. + (sim_info): Ditto. + +2008-08-22 Anthony Green <green@moxielogic.com> + + * interp.c (sim_resume): Remove debugging code. + +2008-08-20 Anthony Green <green@moxielogic.com> + + * interp.c (TRACE): Add new tracing infrastructure. + (sim_resume): Use it. + (reg_names): Add new registers. + (NUM_MOXIE_REGS): New registers. + (PC_REGNO): New registers. + (sim_resume): New instruction encodings. + +2008-08-16 Anthony Green <green@moxielogic.com> + + * interp.c (sim_resume): Add SYS_read, and fix SYS_open and SYS_write. + (convert_target_flags): New function. + +2008-08-08 Anthony Green <green@moxielogic.com> + + * interp.c (sim_resume): Add SYS_open and SYS_write system call support. + +2008-08-04 Anthony Green <green@moxielogic.com> + + * Makefile.in (SIM_EXTRA_LIBS): Add -lz. + +2008-08-04 Anthony Green <green@moxielogic.com> + + * interp.c (sim_create_inferior): Set argc & argv in the target. + +2008-04-12 Anthony Green <green@moxielogic.com> + + * interp.c (sim_resume): Add brk. + +2008-04-10 Anthony Green <green@moxielogic.com> + + * interp.c (sim_resume): Add static chain pointer to call frame. + +2008-03-24 Anthony Green <green@moxielogic.com> + + * interp.c (sim_resume): Add missing breaks. + (sim_resume): Fix neg implementation. + +2008-03-23 Anthony Green <green@moxielogic.com> + + * interp.c (sim_load): Don't require a .bss section. + +2008-03-21 Anthony Green <green@moxielogic.com> + + * interp.c (sim_resume): Add swi, and, lshr, ashl, sub.l, neg, or, + not, ashr, xor. + +2008-03-20 Anthony Green <green@moxielogic.com> + + * interp.c (struct moxie_regset): Add condition code, cc. + (CC_GT, CC_LT, CC_EQ, CC_GTU, CC_LTU): Define. + (sim_resume): Add jmpa, jsr, cmp, beq, bne, blt, bgt, bltu, bgtu, + bge, ble, bgeu, and bleu. + (rbat, rsat, wbat, wsat): New functions. + (sim_resume): Add ld.b, lda.b, ldi.b, ld.s, lda.s, ldi.s, st.b, + sta.b, st.s, sta.s, jmp. + +2008-03-19 Anthony Green <green@moxielogic.com> + + * interp.c (sim_resume): Add ld.l, st.l, lda.l, sta.l. + jsra should set $fp == $sp. + Fix jsra and ret semantics. + +2008-03-18 Anthony Green <green@moxielogic.com> + + * interp.c (sim_resume): Add push, pop and add.l. + +2008-03-16 Anthony Green <green@moxielogic.com> + + * interp.c (EXTRACT_WORD): Define. + (rlat): Use EXTRACT_WORD. + (sim_resume): Add jsra and ret. + +2008-02-22 Anthony Green <green@moxielogic.com> + + * interp.c (reg_names): Define. + (sim_resume): Use reg_names. + +2008-02-21 Anthony Green <green@moxielogic.com> + + * config.in, configure, configure.ac, interp.c, Makefile.in, + sysdep.h: Created. |