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| author | Jeff Law <law@redhat.com> | 1996-12-02 20:12:08 +0000 |
|---|---|---|
| committer | Jeff Law <law@redhat.com> | 1996-12-02 20:12:08 +0000 |
| commit | 216e65571a142e7ce8cc81bef7615cea9eaec89e (patch) | |
| tree | c22d0abc136d0b6460678593ac7ae5b085ea6757 /sim/mn10300 | |
| parent | fcfaf40d78bb2ce2212b9dcdec77a6aab2104db1 (diff) | |
| download | gdb-216e65571a142e7ce8cc81bef7615cea9eaec89e.zip gdb-216e65571a142e7ce8cc81bef7615cea9eaec89e.tar.gz gdb-216e65571a142e7ce8cc81bef7615cea9eaec89e.tar.bz2 | |
* simomps.c: Fix carry bit handling in "sub" and "cmp"
instructions.
Another dozen execution failures fixed.
Diffstat (limited to 'sim/mn10300')
| -rw-r--r-- | sim/mn10300/simops.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/sim/mn10300/simops.c b/sim/mn10300/simops.c index 217cd16..8f22bd5 100644 --- a/sim/mn10300/simops.c +++ b/sim/mn10300/simops.c @@ -1238,7 +1238,7 @@ void OP_F100 () z = (value == 0); n = (value & 0x80000000); - c = (reg1 < reg2); + c = (reg1 > reg2); v = ((reg2 & 0x80000000) != (reg1 & 0x80000000) && (reg2 & 0x80000000) != (value & 0x80000000)); @@ -1260,7 +1260,7 @@ void OP_F120 () z = (value == 0); n = (value & 0x80000000); - c = (reg1 < reg2); + c = (reg1 > reg2); v = ((reg2 & 0x80000000) != (reg1 & 0x80000000) && (reg2 & 0x80000000) != (value & 0x80000000)); @@ -1282,7 +1282,7 @@ void OP_F110 () z = (value == 0); n = (value & 0x80000000); - c = (reg1 < reg2); + c = (reg1 > reg2); v = ((reg2 & 0x80000000) != (reg1 & 0x80000000) && (reg2 & 0x80000000) != (value & 0x80000000)); @@ -1304,7 +1304,7 @@ void OP_F130 () z = (value == 0); n = (value & 0x80000000); - c = (reg1 < reg2); + c = (reg1 > reg2); v = ((reg2 & 0x80000000) != (reg1 & 0x80000000) && (reg2 & 0x80000000) != (value & 0x80000000)); @@ -1370,7 +1370,7 @@ void OP_F180 () z = (value == 0); n = (value & 0x80000000); - c = (reg1 < reg2); + c = (reg1 > reg2); v = ((reg2 & 0x80000000) != (reg1 & 0x80000000) && (reg2 & 0x80000000) != (value & 0x80000000)); @@ -1505,7 +1505,7 @@ void OP_A0 () z = (value == 0); n = (value & 0x80000000); - c = (reg1 < reg2); + c = (reg1 > reg2); v = ((reg2 & 0x80000000) != (reg1 & 0x80000000) && (reg2 & 0x80000000) != (value & 0x80000000)); @@ -1526,7 +1526,7 @@ void OP_F1A0 () z = (value == 0); n = (value & 0x80000000); - c = (reg1 < reg2); + c = (reg1 > reg2); v = ((reg2 & 0x80000000) != (reg1 & 0x80000000) && (reg2 & 0x80000000) != (value & 0x80000000)); @@ -1547,7 +1547,7 @@ void OP_F190 () z = (value == 0); n = (value & 0x80000000); - c = (reg1 < reg2); + c = (reg1 > reg2); v = ((reg2 & 0x80000000) != (reg1 & 0x80000000) && (reg2 & 0x80000000) != (value & 0x80000000)); @@ -1589,7 +1589,7 @@ void OP_B0 () z = (value == 0); n = (value & 0x80000000); - c = (reg1 < reg2); + c = (reg1 > reg2); v = ((reg2 & 0x80000000) != (reg1 & 0x80000000) && (reg2 & 0x80000000) != (value & 0x80000000)); |