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| author | Jeff Law <law@redhat.com> | 1997-03-12 22:05:49 +0000 |
|---|---|---|
| committer | Jeff Law <law@redhat.com> | 1997-03-12 22:05:49 +0000 |
| commit | 09eef8af93534f0df2d7d874f2483389373ef698 (patch) | |
| tree | ff05b84a3bab8cf7d6ebdd42ade9e39ce9cc8feb /sim/mn10300/simops.c | |
| parent | 80633e8e2a8be73fc3ce8ce5b2ae702d75e39b70 (diff) | |
| download | gdb-09eef8af93534f0df2d7d874f2483389373ef698.zip gdb-09eef8af93534f0df2d7d874f2483389373ef698.tar.gz gdb-09eef8af93534f0df2d7d874f2483389373ef698.tar.bz2 | |
* simops.c: Fix typos in bset insns. Fix arguments to store_mem
for bset imm8,(d8,an) and bclr imm8,(d8,an).
Bugs exposed by new compiler optimizations.
Diffstat (limited to 'sim/mn10300/simops.c')
| -rw-r--r-- | sim/mn10300/simops.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/sim/mn10300/simops.c b/sim/mn10300/simops.c index 6ed254f..cd4c98f 100644 --- a/sim/mn10300/simops.c +++ b/sim/mn10300/simops.c @@ -2054,7 +2054,8 @@ void OP_FAF00000 (insn, extension) + SEXT8 ((insn & 0xff00) >> 8)), 1); z = (temp & (insn & 0xff)) == 0; temp |= (insn & 0xff); - store_mem (State.regs[REG_A0 + REG0_16 (insn)], 1, temp); + store_mem ((State.regs[REG_A0 + REG0_16 (insn)] + + SEXT8 ((insn & 0xff00) >> 8)), 1, temp); PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); PSW |= (z ? PSW_Z : 0); } @@ -2068,7 +2069,7 @@ void OP_F090 (insn, extension) temp = load_mem (State.regs[REG_A0 + REG0 (insn)], 1); z = (temp & State.regs[REG_D0 + REG1 (insn)]) == 0; - temp = ~temp & State.regs[REG_D0 + REG1 (insn)]; + temp = temp & ~State.regs[REG_D0 + REG1 (insn)]; store_mem (State.regs[REG_A0 + REG0 (insn)], 1, temp); PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); PSW |= (z ? PSW_Z : 0); @@ -2083,7 +2084,7 @@ void OP_FE010000 (insn, extension) temp = load_mem (((insn & 0xffff) << 16) | (extension >> 8), 1); z = (temp & (extension & 0xff)) == 0; - temp = ~temp & (extension & 0xff); + temp = temp & ~(extension & 0xff); store_mem (((insn & 0xffff) << 16) | (extension >> 8), 1, temp); PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); PSW |= (z ? PSW_Z : 0); @@ -2099,8 +2100,9 @@ void OP_FAF40000 (insn, extension) temp = load_mem ((State.regs[REG_A0 + REG0_16 (insn)] + SEXT8 ((insn & 0xff00) >> 8)), 1); z = (temp & (insn & 0xff)) == 0; - temp = ~temp & (insn & 0xff); - store_mem (State.regs[REG_A0 + REG0_16 (insn)], 1, temp); + temp = temp & ~(insn & 0xff); + store_mem ((State.regs[REG_A0 + REG0_16 (insn)] + + SEXT8 ((insn & 0xff00) >> 8)), 1, temp); PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V); PSW |= (z ? PSW_Z : 0); } |