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| author | Ian Lance Taylor <ian@airs.com> | 1996-12-19 19:08:46 +0000 |
|---|---|---|
| committer | Ian Lance Taylor <ian@airs.com> | 1996-12-19 19:08:46 +0000 |
| commit | deffd638b5941634b3dbfd3f30649c1b37d2d129 (patch) | |
| tree | 940a2f3ebd27c2074c59ccb42e3867e10dfd574b /sim/mips | |
| parent | 9a442fe8a57cea65858b1613b21a2f516a04217d (diff) | |
| download | gdb-deffd638b5941634b3dbfd3f30649c1b37d2d129.zip gdb-deffd638b5941634b3dbfd3f30649c1b37d2d129.tar.gz gdb-deffd638b5941634b3dbfd3f30649c1b37d2d129.tar.bz2 | |
* gencode.c (build_instruction) [MUL]: Cast operands to word64, to
force a 64 bit multiplication.
(build_instruction) [OR]: In mips16 mode, don't do anything if the
destination register is 0, since that is the default mips16 nop
instruction.
Diffstat (limited to 'sim/mips')
| -rw-r--r-- | sim/mips/ChangeLog | 8 | ||||
| -rw-r--r-- | sim/mips/gencode.c | 7 |
2 files changed, 14 insertions, 1 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 00923df..6b76eb9 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,11 @@ +Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com> + + * gencode.c (build_instruction) [MUL]: Cast operands to word64, to + force a 64 bit multiplication. + (build_instruction) [OR]: In mips16 mode, don't do anything if the + destination register is 0, since that is the default mips16 nop + instruction. + Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com> * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI. diff --git a/sim/mips/gencode.c b/sim/mips/gencode.c index bf3d0ed..023c99d 100644 --- a/sim/mips/gencode.c +++ b/sim/mips/gencode.c @@ -1622,7 +1622,7 @@ build_instruction (doisa, features, mips16, insn) if (insn->flags & UNSIGNED) printf(" uword64 temp = ((uword64)(op1 & 0xffffffff) * (uword64)(op2 & 0xffffffff));\n"); else - printf(" uword64 temp = (op1 * op2);\n"); + printf(" uword64 temp = ((word64) op1 * (word64) op2);\n"); printf(" LO = SIGNEXTEND((%s)WORD64LO(temp),32);\n",regtype); printf(" HI = SIGNEXTEND((%s)WORD64HI(temp),32);\n",regtype); } @@ -1795,6 +1795,11 @@ build_instruction (doisa, features, mips16, insn) break ; case OR: + /* The default mips16 nop instruction does an or to register + zero; catch that case, so that we don't get useless warnings + from the simulator. */ + if (mips16) + printf (" if (destreg != 0)\n"); printf(" GPR[destreg] = %s(op1 | op2);\n",((insn->flags & NOT) ? "~" : "")); break ; |