diff options
author | Andrew Cagney <cagney@redhat.com> | 1997-11-20 09:50:36 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1997-11-20 09:50:36 +0000 |
commit | 232156dee9f4c303e3ab320a5cb8a868ece8b0f4 (patch) | |
tree | 3275f8321d421f86d6661c8e605bb0286f7ea1b8 /sim/mips | |
parent | a09a30d2986c11d9a971fe98952e90301e3c1a99 (diff) | |
download | gdb-232156dee9f4c303e3ab320a5cb8a868ece8b0f4.zip gdb-232156dee9f4c303e3ab320a5cb8a868ece8b0f4.tar.gz gdb-232156dee9f4c303e3ab320a5cb8a868ece8b0f4.tar.bz2 |
o Add SIM_SIGFPE to sim-signals
o Start SIM_SIG* at 64 so that the use of host signal numbers can be
detected and reported.
o Update MIPS simulator to use sim-signal.
Diffstat (limited to 'sim/mips')
-rw-r--r-- | sim/mips/ChangeLog | 8 | ||||
-rw-r--r-- | sim/mips/interp.c | 12 | ||||
-rw-r--r-- | sim/mips/sim-main.h | 10 |
3 files changed, 12 insertions, 18 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index f6c4c1a..2b107c4 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,8 +1,12 @@ Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com> - * sim-main.h (Config): New register. + * interp.c (signal_exception): Report internal errors with SIGABRT + not SIGQUIT. - * interp.c (decode_coproc): Allow access to Config register. + * sim-main.h (C0_CONFIG): New register. + (signal.h): No longer include. + + * interp.c (decode_coproc): Allow access C0_CONFIG to register. Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com> diff --git a/sim/mips/interp.c b/sim/mips/interp.c index 49395f8..899cf86 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -1683,7 +1683,7 @@ signal_exception (SIM_DESC sd, else PC = cia; sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, cia, - sim_stopped, SIGTRAP); + sim_stopped, SIM_SIGTRAP); default: /* Store exception code into current exception id variable (used @@ -1738,25 +1738,25 @@ signal_exception (SIM_DESC sd, exception address on breakpoint operations. */ PC = EPC; sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, NULL_CIA, - sim_stopped, SIGBUS); + sim_stopped, SIM_SIGBUS); case ReservedInstruction: case CoProcessorUnusable: PC = EPC; sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, NULL_CIA, - sim_stopped, SIGILL); + sim_stopped, SIM_SIGILL); case IntegerOverflow: case FPE: sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, NULL_CIA, - sim_stopped, SIGFPE); + sim_stopped, SIM_SIGFPE); case Trap: case Watch: case SystemCall: PC = EPC; sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, NULL_CIA, - sim_stopped, SIGTRAP); + sim_stopped, SIM_SIGTRAP); case BreakPoint: PC = EPC; @@ -1766,7 +1766,7 @@ signal_exception (SIM_DESC sd, default : /* Unknown internal exception */ PC = EPC; sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, NULL_CIA, - sim_stopped, SIGQUIT); + sim_stopped, SIM_SIGABRT); } diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h index c6f3ab2..fea63d9 100644 --- a/sim/mips/sim-main.h +++ b/sim/mips/sim-main.h @@ -72,16 +72,6 @@ typedef unsigned64 uword64; /* Check if a value will fit within a halfword: */ #define NOTHALFWORDVALUE(v) ((((((uword64)(v)>>16) == 0) && !((v) & ((unsigned)1 << 15))) || (((((uword64)(v)>>32) == 0xFFFFFFFF) && ((((uword64)(v)>>16) & 0xFFFF) == 0xFFFF)) && ((v) & ((unsigned)1 << 15)))) ? (1 == 0) : (1 == 1)) -/* windows always looses */ -#include <signal.h> -#ifndef SIGBUS -#define SIGBUS SIGSEGV -#endif -#ifdef _WIN32 -#define SIGTRAP 5 -#define SIGQUIT 3 -#endif - /* Floating-point operations: */ |