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| author | Andrew Cagney <cagney@redhat.com> | 1997-10-21 07:40:00 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-10-21 07:40:00 +0000 |
| commit | aa324b9b1e738b4887d0017c4b9b67a869cc1f68 (patch) | |
| tree | 0bfbfeea28cd554bcc9055b69f2f11580173f816 /sim/mips | |
| parent | e2f8ffb736886de349eadebffe1274fddea5d077 (diff) | |
| download | gdb-aa324b9b1e738b4887d0017c4b9b67a869cc1f68.zip gdb-aa324b9b1e738b4887d0017c4b9b67a869cc1f68.tar.gz gdb-aa324b9b1e738b4887d0017c4b9b67a869cc1f68.tar.bz2 | |
Output pc profile statistics once gathered.
Diffstat (limited to 'sim/mips')
| -rw-r--r-- | sim/mips/ChangeLog | 4 | ||||
| -rw-r--r-- | sim/mips/interp.c | 10 |
2 files changed, 5 insertions, 9 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 22594ae..70e602a 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,7 @@ +Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com> + + * interp.c (sim_info): Call profile_print. + Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com> * Makefile.in (SIM_OBJS): Add sim-profile.o module. diff --git a/sim/mips/interp.c b/sim/mips/interp.c index 386d28a..810c51b 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -782,15 +782,6 @@ sim_info (sd,verbose) pr_addr (STATE_MEM_BASE (sd))); #if !defined(FASTSIM) -#if 0 - /* at present this simulator executes one instruction per - simulator cycle. Consequently this data never changes */ - if (instruction_fetch_overflow != 0) - sim_io_printf (sd, "Instruction fetches = 0x%08X%08X\n", - instruction_fetch_overflow, instruction_fetches); - else - sim_io_printf (sd, "Instruction fetches = %d\n", instruction_fetches); -#endif /* It would be a useful feature, if when performing multi-cycle simulations (rather than single-stepping) we keep the start and end times of the execution, so that we can give a performance @@ -810,6 +801,7 @@ sim_info (sd,verbose) /* profile minpc */ /* profile maxpc */ } + profile_print (sd, STATE_VERBOSE_P (sd), NULL, NULL); } |