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| author | Ron Unrau <runrau@cygnus> | 1998-09-09 17:30:31 +0000 |
|---|---|---|
| committer | Ron Unrau <runrau@cygnus> | 1998-09-09 17:30:31 +0000 |
| commit | 323f833dafe4daacb4601b7044c4222211e7a562 (patch) | |
| tree | 022fd51ef4069d6b6dc9ca0059e29fb2b4057fd7 /sim/mips | |
| parent | fc4109089c227d1aaa33d4f7fe51be5d6f5fdf54 (diff) | |
| download | gdb-323f833dafe4daacb4601b7044c4222211e7a562.zip gdb-323f833dafe4daacb4601b7044c4222211e7a562.tar.gz gdb-323f833dafe4daacb4601b7044c4222211e7a562.tar.bz2 | |
Branch merge for GDB:
* sim-main.h: track COP0 registers
* interp.c (sim_{fetch,store}_register): read/write COP0 registers
* sky-gdb.[ch]: add sim pipeorder command
Diffstat (limited to 'sim/mips')
| -rw-r--r-- | sim/mips/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index f5dad1d..90cb47d 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,4 +1,9 @@ start-sanitize-r5900 +Wed Sep 9 11:28:20 1998 Ron Unrau <runrau@cygnus.com> + + * sim-main.h: track COP0 registers + * interp.c (sim_{fetch,store}_register): read/write COP0 registers + Fri Sep 4 10:37:57 1998 Frank Ch. Eigler <fche@cygnus.com> * r5900.igen (mtsab): Correct typo in input register. |