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authorChris Demetriou <cgd@google.com>2002-03-04 04:06:47 +0000
committerChris Demetriou <cgd@google.com>2002-03-04 04:06:47 +0000
commit41774c9d7b326b0a7361793a9dcfc28d514c60cc (patch)
treebc5f8f6d25d2da06ed8bc73f02a71881b0e81c0c /sim/mips
parent4a0bd8769a8dcf44293c5c590cd1e316a1f99bc6 (diff)
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2002-03-03 Chris Demetriou <cgd@broadcom.com>
* mips.igen (FLOOR.L.fmt): Store correct destination register.
Diffstat (limited to 'sim/mips')
-rw-r--r--sim/mips/ChangeLog4
-rw-r--r--sim/mips/mips.igen2
2 files changed, 5 insertions, 1 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 80a4f4d..c17f16e 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,5 +1,9 @@
2002-03-03 Chris Demetriou <cgd@broadcom.com>
+ * mips.igen (FLOOR.L.fmt): Store correct destination register.
+
+2002-03-03 Chris Demetriou <cgd@broadcom.com>
+
* mips.igen: Remove whitespace at end of lines.
2002-03-02 Chris Demetriou <cgd@broadcom.com>
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 582df38..a16a4be 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -3541,7 +3541,7 @@
if ((fmt != fmt_single) && (fmt != fmt_double))
SignalException(ReservedInstruction,instruction_0);
else
- StoreFPR(FS,fmt_long,Convert(FP_RM_TOMINF,ValueFPR(FS,fmt),fmt,fmt_long));
+ StoreFPR(FD,fmt_long,Convert(FP_RM_TOMINF,ValueFPR(FS,fmt),fmt,fmt_long));
}
}