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| author | Andrew Cagney <cagney@redhat.com> | 1998-01-31 06:23:41 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1998-01-31 06:23:41 +0000 |
| commit | 9ec6741b177fbd4d872a13002d540b60b11e4b78 (patch) | |
| tree | 882348d86144658f9148f517f17c39dabe54df1e /sim/mips | |
| parent | 5266a484f4aa49a9ea52adbca949f6224ec2fcee (diff) | |
| download | gdb-9ec6741b177fbd4d872a13002d540b60b11e4b78.zip gdb-9ec6741b177fbd4d872a13002d540b60b11e4b78.tar.gz gdb-9ec6741b177fbd4d872a13002d540b60b11e4b78.tar.bz2 | |
igen: Fix SMP simulator generator support.
Use the bfd-processor name in the sim-engine switch.
Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
Update
mips: Fill in bfd-processor field of model records so that
they match ../bfd/archures.
Diffstat (limited to 'sim/mips')
| -rw-r--r-- | sim/mips/ChangeLog | 9 | ||||
| -rw-r--r-- | sim/mips/interp.c | 5 | ||||
| -rw-r--r-- | sim/mips/sim-main.h | 6 |
3 files changed, 16 insertions, 4 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index e66e8d7..3ea98dd 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,12 @@ +Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * interp.c (sim_engine_run): Add `nr_cpus' argument. + + * mips.igen (model): Map processor names onto BFD name. + + * sim-main.h (CPU_CIA): Delete. + (SET_CIA, GET_CIA): Define + Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com> * sim-main.h (GPR_SET): Define, used by igen when zeroing a diff --git a/sim/mips/interp.c b/sim/mips/interp.c index fe17645..889cc9c 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -3120,13 +3120,14 @@ decode_coproc(sd,cia,instruction) #if (WITH_IGEN > 1) void old_engine_run PARAMS ((SIM_DESC sd, int next_cpu_nr, int siggnal)); void -old_engine_run (sd, next_cpu_nr, siggnal) +old_engine_run (sd, next_cpu_nr, nr_cpus, siggnal) #else void -sim_engine_run (sd, next_cpu_nr, siggnal) +sim_engine_run (sd, next_cpu_nr, nr_cpus, siggnal) #endif SIM_DESC sd; int next_cpu_nr; /* ignore */ + int nr_cpus; /* ignore */ int siggnal; /* ignore */ { #if !defined(FASTSIM) diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h index 201564b..1f56c78 100644 --- a/sim/mips/sim-main.h +++ b/sim/mips/sim-main.h @@ -289,7 +289,8 @@ struct _sim_cpu { /* The following are internal simulator state variables: */ -#define CPU_CIA(CPU) (PC) +#define CIA_GET(CPU) ((CPU)->registers[PCIDX] + 0) +#define CIA_SET(CPU,CIA) ((CPU)->registers[PCIDX] = (CIA)) address_word dspc; /* delay-slot PC */ #define DSPC ((STATE_CPU (sd,0))->dspc) @@ -378,7 +379,8 @@ struct _sim_cpu { #define FGR (®ISTERS[FGRIDX]) #define LO (REGISTERS[33]) #define HI (REGISTERS[34]) -#define PC (REGISTERS[37]) +#define PCIDX 37 +#define PC (REGISTERS[PCIDX]) #define CAUSE (REGISTERS[36]) #define SRIDX (32) #define SR (REGISTERS[SRIDX]) /* CPU status register */ |