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authorJeff Law <law@redhat.com>1997-07-02 18:29:16 +0000
committerJeff Law <law@redhat.com>1997-07-02 18:29:16 +0000
commit649625bb8e871ba65ad97b9bc7323b488739d466 (patch)
treef9a3daf3aba42bf10e6ae714f2a72addd93144bc /sim/mips
parent05d1322f2c0da35836bc0240ac6b66956380baf5 (diff)
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* gencode.c (build_instruction): Handle "ppac5" according to
version 1.95 of the r5900 ISA. fixes pr12407 (c/h from toshiba).
Diffstat (limited to 'sim/mips')
-rw-r--r--sim/mips/ChangeLog5
-rw-r--r--sim/mips/gencode.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index ded2cf3..27a0027 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,5 +1,10 @@
Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
+start-sanitize-r5900
+ * gencode.c (build_instruction): Handle "ppac5" according to
+ version 1.95 of the r5900 ISA.
+end-sanitize-r5900
+
* interp.c (sim_engine_run): Reset the ZERO register to zero
regardless of FEATURE_WARN_ZERO.
* gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
diff --git a/sim/mips/gencode.c b/sim/mips/gencode.c
index c877e5c..fbe9c52 100644
--- a/sim/mips/gencode.c
+++ b/sim/mips/gencode.c
@@ -3994,7 +3994,7 @@ build_instruction (doisa, features, mips16, insn)
printf("for(i=0;i<WORDS_IN_MMI_REGS;i++)\n");
printf(" {\n");
printf(" int x = RT_UW(i);\n");
- printf(" GPR_UW(destreg,i) = ((x & (1 << 24)) >> (24 - 15)) \n");
+ printf(" GPR_UW(destreg,i) = ((x & (1 << 31)) >> (31 - 15)) \n");
printf(" | ((x & (31 << 19)) >> (19 - 10)) \n");
printf(" | ((x & (31 << 11)) >> (11 - 5)) \n");
printf(" | ((x & (31 << 3)) >> (3 - 0)); \n");