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author | Andrew Cagney <cagney@redhat.com> | 1997-10-16 03:23:16 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1997-10-16 03:23:16 +0000 |
commit | 8b70f837905aff4c9aba5d7cbb423bb7f09c5db2 (patch) | |
tree | ed0b23898ae0a9baaced8650c4abfcd5f49c2be3 /sim/mips | |
parent | eaa202ddd464bc4e80c311bd0fb9c60eea22aa14 (diff) | |
download | gdb-8b70f837905aff4c9aba5d7cbb423bb7f09c5db2.zip gdb-8b70f837905aff4c9aba5d7cbb423bb7f09c5db2.tar.gz gdb-8b70f837905aff4c9aba5d7cbb423bb7f09c5db2.tar.bz2 |
* gencode.c (build_instruction): For "FPSQRT", output correct number
of arguments to Recip.
Diffstat (limited to 'sim/mips')
-rw-r--r-- | sim/mips/ChangeLog | 5 | ||||
-rw-r--r-- | sim/mips/gencode.c | 4 |
2 files changed, 8 insertions, 1 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 0e51af9..0ad4fab 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,8 @@ +Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com> + + * gencode.c (build_instruction): For "FPSQRT", output correct + number of arguments to Recip. + Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com> * Makefile.in (interp.o): Depends on sim-main.h diff --git a/sim/mips/gencode.c b/sim/mips/gencode.c index 30f3031..f45685d 100644 --- a/sim/mips/gencode.c +++ b/sim/mips/gencode.c @@ -3456,7 +3456,9 @@ build_instruction (doisa, features, mips16, insn) printf(" if ((format != fmt_single) && (format != fmt_double))\n"); printf(" SignalException(ReservedInstruction,instruction);\n"); printf(" else\n"); - printf(" StoreFPR(destreg,format,%s(SquareRoot(ValueFPR(fs,format),format)));\n",((insn->flags & RECIP) ? "Recip" : "")); + printf(" StoreFPR(destreg,format,%s(SquareRoot(ValueFPR(fs,format),format)%s));\n", + ((insn->flags & RECIP) ? "Recip" : ""), + ((insn->flags & RECIP) ? ",format" : "")); break ; case FPCEIL: |