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| author | Andrew Cagney <cagney@redhat.com> | 1998-04-21 05:25:56 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1998-04-21 05:25:56 +0000 |
| commit | 515125b7096de2507a17147b650ea1f1b92ad18f (patch) | |
| tree | e95f795b249264965c0c4a9a53ed25119e05e0d9 /sim/mips | |
| parent | 97f4d183416b7319db0a2c44296e4b677a17d956 (diff) | |
| download | gdb-515125b7096de2507a17147b650ea1f1b92ad18f.zip gdb-515125b7096de2507a17147b650ea1f1b92ad18f.tar.gz gdb-515125b7096de2507a17147b650ea1f1b92ad18f.tar.bz2 | |
Entry about changing sim_open missing from changelog.
Diffstat (limited to 'sim/mips')
| -rw-r--r-- | sim/mips/ChangeLog | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index f183029..d2140e3 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -10,6 +10,8 @@ Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com> (signal_exception): On TRAP, restart at exception address. (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define. (signal_exception): Update. + (sim_open): Patch V_COMMON interrupt vector with an abort sequence + so that TRAP instructions are caught. Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com> |