diff options
author | Jeff Law <law@redhat.com> | 1997-07-02 17:57:56 +0000 |
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committer | Jeff Law <law@redhat.com> | 1997-07-02 17:57:56 +0000 |
commit | ae19b07bf8b548d109bb9dabb24b1a6eb869b89e (patch) | |
tree | fdba5374ac7b8d796ef527f305d274f50ba2c5ce /sim/mips | |
parent | b709b16fdcc6252d9d9fbaad366af4e22833b69a (diff) | |
download | gdb-ae19b07bf8b548d109bb9dabb24b1a6eb869b89e.zip gdb-ae19b07bf8b548d109bb9dabb24b1a6eb869b89e.tar.gz gdb-ae19b07bf8b548d109bb9dabb24b1a6eb869b89e.tar.bz2 |
* gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
Fix for pr12402 (c/h from toshiba).
Diffstat (limited to 'sim/mips')
-rw-r--r-- | sim/mips/ChangeLog | 13 | ||||
-rw-r--r-- | sim/mips/gencode.c | 10 |
2 files changed, 20 insertions, 3 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 3a1e213..d272c80 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,4 +1,14 @@ -start-sanitize-r5900 +Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com) + + * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO. + +Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com> + + * interp.c (decode_coproc): Implement MTC0 N, CAUSE. + (SignalException): For BreakPoints ignore any mode bits and just + save the PC. + (SignalException): Always set the CAUSE register. + Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com> * interp.c (SignalException): Clear the simDELAYSLOT flag when an @@ -6,6 +16,7 @@ Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com> * interp.c: Implement the ERET and mt/f sr instructions. +start-sanitize-r5900 Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com> * gencode.c (build_instruction): For paddu, extract unsigned diff --git a/sim/mips/gencode.c b/sim/mips/gencode.c index 57e7891..c877e5c 100644 --- a/sim/mips/gencode.c +++ b/sim/mips/gencode.c @@ -117,10 +117,16 @@ #define FEATURE_WARN_R31 (1 << 28) /* 0 = nothing; 1 = generate warnings if r31 used dangerously */ #define FEATURE_WARN_RESULT (1 << 29) /* 0 = nothing; 1 = generate warnings when undefined results may occur */ +/* We used to enable FEATURE_WARN_ZERO, but it is perfectly legitimate to + have the zero register as a destination -- the zero register just doesn't + actually change. */ +/* start-sanitize-r5900 */ +/* The 5900 madd instructions for example use this feature. */ +/* end-sanitize-r5900 */ #if 1 -#define FEATURE_WARNINGS (FEATURE_WARN_STALL | FEATURE_WARN_LOHI | FEATURE_WARN_ZERO | FEATURE_WARN_R31) +#define FEATURE_WARNINGS (FEATURE_WARN_STALL | FEATURE_WARN_LOHI | FEATURE_WARN_R31) #else -#define FEATURE_WARNINGS (FEATURE_WARN_STALL | FEATURE_WARN_LOHI | FEATURE_WARN_ZERO | FEATURE_WARN_R31 | FEATURE_WARN_RESULT) +#define FEATURE_WARNINGS (FEATURE_WARN_STALL | FEATURE_WARN_LOHI | FEATURE_WARN_R31 | FEATURE_WARN_RESULT) #endif /* FEATURE_WARN_STALL */ |