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| author | Andrew Cagney <cagney@redhat.com> | 1997-11-11 07:50:13 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-11-11 07:50:13 +0000 |
| commit | 030843d7f82aaf1ea2752cbdbb79013256acb847 (patch) | |
| tree | caeb7f66c0f776b6771bc03d7a554e3ada068658 /sim/mips/vr5400.igen | |
| parent | f445a8902d6862078a541defb2b8ae29daa6d37d (diff) | |
| download | gdb-030843d7f82aaf1ea2752cbdbb79013256acb847.zip gdb-030843d7f82aaf1ea2752cbdbb79013256acb847.tar.gz gdb-030843d7f82aaf1ea2752cbdbb79013256acb847.tar.bz2 | |
Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1,
SWXC1MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1, MULT, MULTU, BEQZ, ...MTHI,
MFHI instructions.
Trace nullified instruction.
Diffstat (limited to 'sim/mips/vr5400.igen')
| -rw-r--r-- | sim/mips/vr5400.igen | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/mips/vr5400.igen b/sim/mips/vr5400.igen index f9e5981..3fcd3e0 100644 --- a/sim/mips/vr5400.igen +++ b/sim/mips/vr5400.igen @@ -56,7 +56,7 @@ GPR[RD] = Low32Bits (SD_, MulAcc (SD_)); } -// Unsigned Multiply and Move Low. +// Unsigned Multiply and Move LO. 000000,5.RS,5.RT,5.RD,00001,011001::::MULU "mulu r<RD>, r<RS>, r<RT>" *vr5400: |