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| author | Chris Demetriou <cgd@google.com> | 2005-05-26 21:31:57 +0000 |
|---|---|---|
| committer | Chris Demetriou <cgd@google.com> | 2005-05-26 21:31:57 +0000 |
| commit | e70cb6cd9ab5e88c1d4fe20a454ddc3bcd1a4453 (patch) | |
| tree | 8ed7b9aa5eaf6b89e26dfc3cecb415ec3651432c /sim/mips/vr.igen | |
| parent | 47b667dea5dd1f1c4fc7a1304163c254ffa16161 (diff) | |
| download | gdb-e70cb6cd9ab5e88c1d4fe20a454ddc3bcd1a4453.zip gdb-e70cb6cd9ab5e88c1d4fe20a454ddc3bcd1a4453.tar.gz gdb-e70cb6cd9ab5e88c1d4fe20a454ddc3bcd1a4453.tar.bz2 | |
2005-05-26 David Ung <davidu@mips.com>
* mips.igen (mips32r2, mips64r2): New ISA models. Add new model
tags to all instructions which are applicable to the new ISAs.
(do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
vr.igen.
* mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
instructions.
* vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
to mips.igen.
* configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
* configure: Regenerate.
Diffstat (limited to 'sim/mips/vr.igen')
| -rw-r--r-- | sim/mips/vr.igen | 68 |
1 files changed, 0 insertions, 68 deletions
diff --git a/sim/mips/vr.igen b/sim/mips/vr.igen index 742a85d..9266ae6 100644 --- a/sim/mips/vr.igen +++ b/sim/mips/vr.igen @@ -100,35 +100,6 @@ GPR[rd] = store_hi_p ? HI : LO; } -// 32-bit rotate right of X by Y bits. -:function:::unsigned64:do_ror:unsigned32 x,unsigned32 y -*vr5400: -*vr5500: -{ - unsigned64 result; - - y &= 31; - TRACE_ALU_INPUT2 (x, y); - result = EXTEND32 (ROTR32 (x, y)); - TRACE_ALU_RESULT (result); - return result; -} - -// Likewise 64-bit -:function:::unsigned64:do_dror:unsigned64 x,unsigned64 y -*vr5400: -*vr5500: -{ - unsigned64 result; - - y &= 63; - TRACE_ALU_INPUT2 (x, y); - result = ROTR64 (x, y); - TRACE_ALU_RESULT (result); - return result; -} - - // VR4100 instructions. 000000,5.RS,5.RT,00000,00000,101000::32::MADD16 @@ -246,45 +217,6 @@ 0 /* single */); } -000000,00001,5.RT,5.RD,5.SHIFT,000010::32::ROR -"ror r<RD>, r<RT>, <SHIFT>" -*vr5400: -*vr5500: -{ - GPR[RD] = do_ror (SD_, GPR[RT], SHIFT); -} - -000000,5.RS,5.RT,5.RD,00001,000110::32::RORV -"rorv r<RD>, r<RT>, r<RS>" -*vr5400: -*vr5500: -{ - GPR[RD] = do_ror (SD_, GPR[RT], GPR[RS]); -} - -000000,00001,5.RT,5.RD,5.SHIFT,111010::64::DROR -"dror r<RD>, r<RT>, <SHIFT>" -*vr5400: -*vr5500: -{ - GPR[RD] = do_dror (SD_, GPR[RT], SHIFT); -} - -000000,00001,5.RT,5.RD,5.SHIFT,111110::64::DROR32 -"dror32 r<RD>, r<RT>, <SHIFT>" -*vr5400: -*vr5500: -{ - GPR[RD] = do_dror (SD_, GPR[RT], SHIFT + 32); -} - -000000,5.RS,5.RT,5.RD,00001,010110::64::DRORV -"drorv r<RD>, r<RT>, r<RS>" -*vr5400: -*vr5500: -{ - GPR[RD] = do_dror (SD_, GPR[RT], GPR[RS]); -} 010011,5.BASE,5.INDEX,5.0,5.FD,000101:COP1X:64::LUXC1 "luxc1 f<FD>, r<INDEX>(r<BASE>)" |