Initial creation of sourceware repositorygdb-4_18-branchpoint

1 files changed, 31 insertions, 0 deletions

diff --git a/sim/mips/tconfig.in b/sim/mips/tconfig.in
new file mode 100644
index 0000000..e8062a3
--- /dev/null
+++ b/sim/mips/tconfig.in
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+/* mips target configuration file.  */
+
+/* See sim-hload.c.  We properly handle LMA.  */
+#ifdef TARGET_TX3904
+#define SIM_HANDLES_LMA 1
+
+/* FIXME: This is unnecessarily necessary: */
+#include "ansidecl.h"
+#include "callback.h"
+#include "remote-sim.h"
+#include "sim-module.h"
+
+MODULE_INSTALL_FN dv_sockser_install;
+#define MODULE_LIST dv_sockser_install,
+#endif
+
+/* Define this if the simulator supports profiling.
+   See the mips simulator for an example.
+   This enables the `-p foo' and `-s bar' options.
+   The target is required to provide sim_set_profile{,_size}.  */
+#define SIM_HAVE_PROFILE
+
+/* Define this if the simulator uses an instruction cache.
+   See the h8/300 simulator for an example.
+   This enables the `-c size' option to set the size of the cache.
+   The target is required to provide sim_set_simcache_size.  */
+/* #define SIM_HAVE_SIMCACHE */
+
+/* Define this if the target cpu is bi-endian
+   and the simulator supports it.  */
+#define SIM_HAVE_BIENDIAN