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| author | Stan Shebs <shebs@codesourcery.com> | 1999-09-09 00:02:17 +0000 |
|---|---|---|
| committer | Stan Shebs <shebs@codesourcery.com> | 1999-09-09 00:02:17 +0000 |
| commit | d4f3574e777abfa65c9ba134e582228f3f32a8d6 (patch) | |
| tree | 408b74c26833555087f04f4ec466afd488af6087 /sim/mips/mips.igen | |
| parent | 325188ecac3a52d92d359c70f9b730470760e1d7 (diff) | |
| download | gdb-d4f3574e777abfa65c9ba134e582228f3f32a8d6.zip gdb-d4f3574e777abfa65c9ba134e582228f3f32a8d6.tar.gz gdb-d4f3574e777abfa65c9ba134e582228f3f32a8d6.tar.bz2 | |
import gdb-1999-09-08 snapshot
Diffstat (limited to 'sim/mips/mips.igen')
| -rw-r--r-- | sim/mips/mips.igen | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen index ad5700b..17748fe 100644 --- a/sim/mips/mips.igen +++ b/sim/mips/mips.igen @@ -76,6 +76,7 @@ CIA = CIA + 4; /* NOTE not mips16 */ STATE |= simDELAYSLOT; delay_insn = IMEM32 (CIA); /* NOTE not mips16 */ + ENGINE_ISSUE_PREFIX_HOOK(); idecode_issue (CPU_, delay_insn, (CIA)); STATE &= ~simDELAYSLOT; return target; @@ -1748,7 +1749,7 @@ *mipsI,mipsII,mipsIII,mipsIV: *vr4100: { - do_multu (SD_, RS, RT, 0); + do_multu (SD_, RS, RT, RD); } 000000,5.RS,5.RT,5.RD,00000011001:SPECIAL:32::MULTU |