aboutsummaryrefslogtreecommitdiff
path: root/sim/mips/mips.igen
diff options
context:
space:
mode:
authorChris Demetriou <cgd@google.com>2002-02-28 07:01:14 +0000
committerChris Demetriou <cgd@google.com>2002-02-28 07:01:14 +0000
commitaf5107af975bcf912be1187f4210706db408dabe (patch)
tree0aced11aec5d6986758e26a69129a58a777ed2be /sim/mips/mips.igen
parent3422b41a7413161dcb5e2cffbd7ea532c32119ab (diff)
downloadgdb-af5107af975bcf912be1187f4210706db408dabe.zip
gdb-af5107af975bcf912be1187f4210706db408dabe.tar.gz
gdb-af5107af975bcf912be1187f4210706db408dabe.tar.bz2
2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (PREFX): Tweak instruction opcode fields (i.e., add a comma) so that it more closely match the MIPS ISA documentation opcode partitioning. (PREF): Put useful names on opcode fields, and include instruction-printing string.
Diffstat (limited to 'sim/mips/mips.igen')
-rw-r--r--sim/mips/mips.igen5
1 files changed, 3 insertions, 2 deletions
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 72626d2..d19ac97 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -2083,7 +2083,8 @@
}
-110011,5.RS,nnnnn,16.OFFSET:NORMAL:32::PREF
+110011,5.BASE,5.HINT,16.OFFSET:NORMAL:32::PREF
+"pref <HINT>, <OFFSET>(r<BASE>)"
*mipsIV:
*mipsV:
*vr5000:
@@ -3974,7 +3975,7 @@
}
-010011,5.BASE,5.INDEX,5.HINT,00000001111:COP1X:32::PREFX
+010011,5.BASE,5.INDEX,5.HINT,00000,001111:COP1X:32::PREFX
"prefx <HINT>, r<INDEX>(r<BASE>)"
*mipsIV:
*mipsV: