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| author | Andrew Cagney <cagney@redhat.com> | 1997-10-29 04:02:30 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-10-29 04:02:30 +0000 |
| commit | 01b9cd49ca5f88eead7aebce7610584cb820a6b5 (patch) | |
| tree | ea0f4bf0cf22e63766a09a34f1bc4bbfd6efb2d1 /sim/mips/mips.igen | |
| parent | a0539c6102cfebe84a82a5f21c4899e92b4e1adb (diff) | |
| download | gdb-01b9cd49ca5f88eead7aebce7610584cb820a6b5.zip gdb-01b9cd49ca5f88eead7aebce7610584cb820a6b5.tar.gz gdb-01b9cd49ca5f88eead7aebce7610584cb820a6b5.tar.bz2 | |
common/sim-bits.h: Document ROTn macro.
igen/{igen.c,ld-insns.h}: Document mnemonic string formats.
mips/Makefile.in: Add dependencies for files included by mips.igen
mips/vr5400.igen: checkpoint vr5400 instructions.
Diffstat (limited to 'sim/mips/mips.igen')
| -rw-r--r-- | sim/mips/mips.igen | 27 |
1 files changed, 12 insertions, 15 deletions
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen index f84519d..185d99e 100644 --- a/sim/mips/mips.igen +++ b/sim/mips/mips.igen @@ -612,9 +612,6 @@ *mipsII: *mipsIII: *mipsIV: -// start-sanitize-vr5400 -*vr5400: -// end-sanitize-vr5400 // start-sanitize-r5900 *r5900: // end-sanitize-r5900 @@ -953,7 +950,7 @@ 00000000000,5.RT,5.RD,5.SHIFT,111000:SPECIAL:64::DSLL -"dsll r<RD>, r<RT>, <SA>" +"dsll r<RD>, r<RT>, <SHIFT>" *mipsIII: *mipsIV: // start-sanitize-vr5400 @@ -967,13 +964,13 @@ *tx19: // end-sanitize-tx19 { - int s = SA; + int s = SHIFT; GPR[RD] = GPR[RT] << s; } 00000000000,5.RT,5.RD,5.SHIFT,111100:SPECIAL:64::DSLL32 -"dsll32 r<RD>, r<RT>, <SA>" +"dsll32 r<RD>, r<RT>, <SHIFT>" *mipsIII: *mipsIV: // start-sanitize-vr5400 @@ -987,7 +984,7 @@ *tx19: // end-sanitize-tx19 { - int s = 32 + SA; + int s = 32 + SHIFT; GPR[RD] = GPR[RT] << s; } @@ -1013,7 +1010,7 @@ 00000000000,5.RT,5.RD,5.SHIFT,111011:SPECIAL:64::DSRA -"dsra r<RD>, r<RT>, <SA>" +"dsra r<RD>, r<RT>, <SHIFT>" *mipsIII: *mipsIV: // start-sanitize-vr5400 @@ -1027,13 +1024,13 @@ *tx19: // end-sanitize-tx19 { - int s = SA; + int s = SHIFT; GPR[RD] = ((signed64) GPR[RT]) >> s; } 00000000000,5.RT,5.RD,5.SHIFT,111111:SPECIAL:64::DSRA32 -"dsra32 r<RT>, r<RD>, <SA>" +"dsra32 r<RT>, r<RD>, <SHIFT>" *mipsIII: *mipsIV: // start-sanitize-vr5400 @@ -1047,7 +1044,7 @@ *tx19: // end-sanitize-tx19 { - int s = 32 + SA; + int s = 32 + SHIFT; GPR[RD] = ((signed64) GPR[RT]) >> s; } @@ -1073,7 +1070,7 @@ 00000000000,5.RT,5.RD,5.SHIFT,111010:SPECIAL:64::DSRL -"dsrav r<RD>, r<RT>, <SA>" +"dsrav r<RD>, r<RT>, <SHIFT>" *mipsIII: *mipsIV: // start-sanitize-vr5400 @@ -1087,13 +1084,13 @@ *tx19: // end-sanitize-tx19 { - int s = SA; + int s = SHIFT; GPR[RD] = (unsigned64) GPR[RT] >> s; } 00000000000,5.RT,5.RD,5.SHIFT,111110:SPECIAL:64::DSRL32 -"dsrl32 r<RD>, r<RT>, <SA>" +"dsrl32 r<RD>, r<RT>, <SHIFT>" *mipsIII: *mipsIV: // start-sanitize-vr5400 @@ -1107,7 +1104,7 @@ *tx19: // end-sanitize-tx19 { - int s = 32 + SA; + int s = 32 + SHIFT; GPR[RD] = (unsigned64) GPR[RT] >> s; } |