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authorAndrew Cagney <cagney@redhat.com>1998-03-03 05:39:49 +0000
committerAndrew Cagney <cagney@redhat.com>1998-03-03 05:39:49 +0000
commitca6f76d13558a4ae3935f309db6d4540114b6a14 (patch)
treeee1d95cf7cebcc52a8b7bd8d0f011c6420725d50 /sim/mips/mips.igen
parent3cdda79a7cf4730828844e8523e42373214423a4 (diff)
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Fix DIV, DIV1 (wrong check for overflow) and DIVU1 (shouldn't check
for overflow). Pacify GCC.
Diffstat (limited to 'sim/mips/mips.igen')
-rw-r--r--sim/mips/mips.igen7
1 files changed, 5 insertions, 2 deletions
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 839ae7a..64a7c73 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -1,3 +1,5 @@
+// -*- C -*-
+//
// <insn> ::=
// <insn-word> { "+" <insn-word> }
// ":" <format-name>
@@ -624,9 +626,10 @@
*tx19:
// end-sanitize-tx19
{
+ /* this check's for overflow */
ALU64_BEGIN (GPR[RS]);
ALU64_ADD (GPR[RT]);
- ALU64_END (GPR[RT]);
+ ALU64_END (GPR[RD]);
}
@@ -787,7 +790,7 @@
LO = EXTEND32 (0x80000000);
HI = EXTEND32 (0);
}
- else if (d == -1 && d == 0x80000000)
+ else if (n == SIGNED32 (0x80000000) && d == -1)
{
LO = EXTEND32 (0x80000000);
HI = EXTEND32 (0);