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author | Frank Ch. Eigler <fche@redhat.com> | 1998-06-04 12:43:45 +0000 |
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committer | Frank Ch. Eigler <fche@redhat.com> | 1998-06-04 12:43:45 +0000 |
commit | da040f2a6c7a5dfa3c2bacecc97128ac4477d904 (patch) | |
tree | d277d4307eecfd810b83c298ab6c1d9fdef7419c /sim/mips/interp.c | |
parent | 0e797366efd0c7aad9acddcaeac4a55a0fd8bfb7 (diff) | |
download | gdb-da040f2a6c7a5dfa3c2bacecc97128ac4477d904.zip gdb-da040f2a6c7a5dfa3c2bacecc97128ac4477d904.tar.gz gdb-da040f2a6c7a5dfa3c2bacecc97128ac4477d904.tar.bz2 |
* Early check-in of tx3904 timer sim implementation for ECC.
It is not yet properly tested.
Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904tmr.c: New file - implements tx3904 timer.
* dv-tx3904{irc,cpu}.c: Mild reformatting.
* configure.in: Include tx3904tmr in hw_device list.
* configure: Rebuilt.
* interp.c (sim_open): Instantiate three timer instances.
Fix address typo of tx3904irc instance.
Diffstat (limited to 'sim/mips/interp.c')
-rw-r--r-- | sim/mips/interp.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/sim/mips/interp.c b/sim/mips/interp.c index 4738f7f..e0ec3e3 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -518,11 +518,17 @@ sim_open (kind, cb, abfd, argv) 0xA8000000); /* --- simulated devices --- */ - sim_hw_parse (sd, "/tx3904irc@0xffffc00/reg 0xffffc000 0x20"); + sim_hw_parse (sd, "/tx3904irc@0xffffc000/reg 0xffffc000 0x20"); sim_hw_parse (sd, "/tx3904cpu"); + sim_hw_parse (sd, "/tx3904tmr@0xfffff000/reg 0xfffff000 0x100"); + sim_hw_parse (sd, "/tx3904tmr@0xfffff100/reg 0xfffff100 0x100"); + sim_hw_parse (sd, "/tx3904tmr@0xfffff200/reg 0xfffff200 0x100"); /* -- device connections --- */ sim_hw_parse (sd, "/tx3904irc > ip level /tx3904cpu"); + sim_hw_parse (sd, "/tx3904tmr@0xfffff000 > int tmr0 /tx3904irc"); + sim_hw_parse (sd, "/tx3904tmr@0xfffff100 > int tmr1 /tx3904irc"); + sim_hw_parse (sd, "/tx3904tmr@0xfffff200 > int tmr2 /tx3904irc"); if(! strcmp(board, BOARD_JMR3904_DEBUG)) { |