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author | Ian Carmichael <iancarm@cygnus> | 1998-06-09 16:54:08 +0000 |
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committer | Ian Carmichael <iancarm@cygnus> | 1998-06-09 16:54:08 +0000 |
commit | 895a7dc2aa8fc1903f0bd3e160ae2eccfbb328f4 (patch) | |
tree | d5db18596895078a6ffc0fadf96063eea675f55d /sim/mips/interp.c | |
parent | 18993a6868f5a295f156a0209948f15545841b73 (diff) | |
download | gdb-895a7dc2aa8fc1903f0bd3e160ae2eccfbb328f4.zip gdb-895a7dc2aa8fc1903f0bd3e160ae2eccfbb328f4.tar.gz gdb-895a7dc2aa8fc1903f0bd3e160ae2eccfbb328f4.tar.bz2 |
* Handle 10 and 20-bit versions of Break instruction. Move handling
* of special values from signal_exception() in interp.c into mips.igen.
*
* Modified: gencode.c interp.c mips.igen sim-main.h
Diffstat (limited to 'sim/mips/interp.c')
-rw-r--r-- | sim/mips/interp.c | 45 |
1 files changed, 1 insertions, 44 deletions
diff --git a/sim/mips/interp.c b/sim/mips/interp.c index 07b7e6b..f35674a 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -110,23 +110,11 @@ char* pr_uword64 PARAMS ((uword64 addr)); #define RSVD_INSTRUCTION_ARG_MASK 0xFFFFF -/* The following reserved instruction value is used when a simulator - halt is required. NOTE: Care must be taken, since this value may - be used in later revisions of the MIPS ISA. */ -#define HALT_INSTRUCTION (0x03ff000d) -#define HALT_INSTRUCTION2 (0x0000ffcd) -#define HALT_INSTRUCTION_MASK (0x03FFFFC0) - - /* Bits in the Debug register */ #define Debug_DBD 0x80000000 /* Debug Branch Delay */ #define Debug_DM 0x40000000 /* Debug Mode */ #define Debug_DBp 0x00000002 /* Debug Breakpoint indicator */ - - - - /*---------------------------------------------------------------------------*/ /*-- GDB simulator interface ------------------------------------------------*/ /*---------------------------------------------------------------------------*/ @@ -1839,33 +1827,6 @@ signal_exception (SIM_DESC sd, sim_io_eprintf(sd,"ReservedInstruction at PC = 0x%s\n", pr_addr (cia)); } - case BreakPoint: -#ifdef DEBUG - sim_io_printf(sd,"DBG: SignalException(%d) PC = 0x%s\n",exception,pr_addr(cia)); -#endif /* DEBUG */ - /* Keep a copy of the current A0 in-case this is the program exit - breakpoint: */ - { - va_list ap; - unsigned int instruction; - va_start(ap, exception); - instruction = va_arg(ap,unsigned int); - va_end(ap); - /* Check for our special terminating BREAK: */ - if ((instruction & HALT_INSTRUCTION_MASK) == (HALT_INSTRUCTION & HALT_INSTRUCTION_MASK) || - (instruction & HALT_INSTRUCTION_MASK) == (HALT_INSTRUCTION2 & HALT_INSTRUCTION_MASK)) - { - sim_engine_halt (SD, CPU, NULL, cia, - sim_exited, (unsigned int)(A0 & 0xFFFFFFFF)); - } - } - if (STATE & simDELAYSLOT) - PC = cia - 4; /* reference the branch instruction */ - else - PC = cia; - sim_engine_halt (SD, CPU, NULL, cia, - sim_stopped, SIM_SIGTRAP); - default: /* Store exception code into current exception id variable (used by exit code): */ @@ -1964,6 +1925,7 @@ signal_exception (SIM_DESC sd, sim_engine_halt (SD, CPU, NULL, NULL_CIA, sim_stopped, SIM_SIGFPE); + case BreakPoint: case SystemCall: case Trap: sim_engine_restart (SD, CPU, NULL, PC); @@ -1974,11 +1936,6 @@ signal_exception (SIM_DESC sd, sim_engine_halt (SD, CPU, NULL, NULL_CIA, sim_stopped, SIM_SIGTRAP); - case BreakPoint: - PC = EPC; - sim_engine_abort (SD, CPU, NULL_CIA, - "FATAL: Should not encounter a breakpoint\n"); - default : /* Unknown internal exception */ PC = EPC; sim_engine_halt (SD, CPU, NULL, NULL_CIA, |