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| author | Ian Lance Taylor <ian@airs.com> | 1996-09-19 22:52:26 +0000 |
|---|---|---|
| committer | Ian Lance Taylor <ian@airs.com> | 1996-09-19 22:52:26 +0000 |
| commit | c05d17211ee207282e7a8a397a2ee39d798dc708 (patch) | |
| tree | e887a7efa730eaa2b92f8ac0210a6419346ccf19 /sim/mips/interp.c | |
| parent | 47c6ce6c2de14635d0d71d63e5dbea036084b6ec (diff) | |
| download | gdb-c05d17211ee207282e7a8a397a2ee39d798dc708.zip gdb-c05d17211ee207282e7a8a397a2ee39d798dc708.tar.gz gdb-c05d17211ee207282e7a8a397a2ee39d798dc708.tar.bz2 | |
* interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
It's OK to have a mult follow a mult. What's not OK is to have a
mult follow an mfhi.
Diffstat (limited to 'sim/mips/interp.c')
| -rw-r--r-- | sim/mips/interp.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/sim/mips/interp.c b/sim/mips/interp.c index c5fdaeb..9c47b4a 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -361,10 +361,6 @@ static ut_reg HLPC = 0; #define CHECKHILO(s) {\ if ((HIACCESS != 0) || (LOACCESS != 0))\ sim_warning("%s over-writing HI and LO registers values (PC = 0x%08X%08X HLPC = 0x%08X%08X)\n",(s),(unsigned int)(PC>>32),(unsigned int)(PC&0xFFFFFFFF),(unsigned int)(HLPC>>32),(unsigned int)(HLPC&0xFFFFFFFF));\ - /* Set the access counts, since we are about\ - to update the HI and LO registers: */\ - HIACCESS = LOACCESS = 3; /* 3rd instruction will be safe */\ - HLPC = PC;\ } /* NOTE: We keep the following status flags as bit values (1 for true, |