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author | Ian Lance Taylor <ian@airs.com> | 1996-09-20 19:49:49 +0000 |
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committer | Ian Lance Taylor <ian@airs.com> | 1996-09-20 19:49:49 +0000 |
commit | 149ee67274766a0a56a671ec2c35b556b5fdb4ae (patch) | |
tree | d940ea0a60056b234a3b076fbc7fccc7a07295c8 /sim/mips/gencode.c | |
parent | e12ab364d210b4e6418145ae2457b2d4f7e65a21 (diff) | |
download | gdb-149ee67274766a0a56a671ec2c35b556b5fdb4ae.zip gdb-149ee67274766a0a56a671ec2c35b556b5fdb4ae.tar.gz gdb-149ee67274766a0a56a671ec2c35b556b5fdb4ae.tar.bz2 |
* gencode.c (process_instructions): Call build_endian_shift when
expanding STORE RIGHT, to fix swr.
* support.h (SIGNEXTEND): If the sign bit is not set, explicitly
clear the high bits.
* interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
Fix float to int conversions to produce signed values.
Diffstat (limited to 'sim/mips/gencode.c')
-rw-r--r-- | sim/mips/gencode.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sim/mips/gencode.c b/sim/mips/gencode.c index ff27ef6..dce648a 100644 --- a/sim/mips/gencode.c +++ b/sim/mips/gencode.c @@ -1530,6 +1530,7 @@ process_instructions(doarch,features) printf(" GPR[destreg] = SIGNEXTEND(GPR[destreg],32);\n"); } else { /* store */ printf(" memval = (op2 << (byte * 8));\n"); + build_endian_shift(proc64,datalen,2,s_left,32); printf(" StoreMemory(uncached,(%s - byte),memval,paddr,vaddr,isREAL);\n",accesslength); } } |