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authorThiemo Seufer <ths@networkno.de>2007-02-19 17:31:08 +0000
committerThiemo Seufer <ths@networkno.de>2007-02-19 17:31:08 +0000
commit14fb6c5a50336c2fc6cb6db8057efa613154f4f8 (patch)
tree5360942ff0daa6d184b9cebb474407ae595bd194 /sim/mips/cp1.c
parentb8e558488cb3c85687107ef81b2504fac0c11a6b (diff)
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* cp1.c (value_fpr): Don't inherit existing FPR_STATE for
uninterpreted formats. If fmt is one of the uninterpreted types don't update the FPR_STATE. Handle fmt_uninterpreted_32 like fmt_word, and fmt_uninterpreted_64 like fmt_long. (store_fpr): When writing an invalid odd register, set the matching even register to fmt_unknown, not the following register. * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to the the memory window at offset 0 set by --memory-size command line option. (sim_store_register): Handle storing 4 bytes to an 8 byte floating point register. (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte register. (sim_monitor): When returning the memory size to the MIPS application, use the value in STATE_MEM_SIZE, not an arbitrary hardcoded value. (cop_lw): Don' mess around with FPR_STATE, just pass fmt_uninterpreted_32 to StoreFPR. (cop_sw): Similarly. (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted. (cop_sd): Similarly. * mips.igen (not_word_value): Single version for mips32, mips64 and mips16.
Diffstat (limited to 'sim/mips/cp1.c')
-rw-r--r--sim/mips/cp1.c35
1 files changed, 21 insertions, 14 deletions
diff --git a/sim/mips/cp1.c b/sim/mips/cp1.c
index 5e569ef..d8ee00e 100644
--- a/sim/mips/cp1.c
+++ b/sim/mips/cp1.c
@@ -111,10 +111,10 @@ value_fpr (sim_cpu *cpu,
int err = 0;
/* Treat unused register values, as fixed-point 64bit values. */
- if ((fmt == fmt_uninterpreted) || (fmt == fmt_unknown))
+ if (fmt == fmt_unknown)
{
#if 1
- /* If request to read data as "uninterpreted", then use the current
+ /* If request to read data as "unknown", then use the current
encoding: */
fmt = FPR_STATE[fpr];
#else
@@ -123,20 +123,23 @@ value_fpr (sim_cpu *cpu,
}
/* For values not yet accessed, set to the desired format. */
- if (FPR_STATE[fpr] == fmt_uninterpreted)
+ if (fmt < fmt_uninterpreted)
{
- FPR_STATE[fpr] = fmt;
+ if (FPR_STATE[fpr] == fmt_uninterpreted)
+ {
+ FPR_STATE[fpr] = fmt;
#ifdef DEBUG
- printf ("DBG: Register %d was fmt_uninterpreted. Now %s\n", fpr,
- fpu_format_name (fmt));
+ printf ("DBG: Register %d was fmt_uninterpreted. Now %s\n", fpr,
+ fpu_format_name (fmt));
#endif /* DEBUG */
- }
- if (fmt != FPR_STATE[fpr])
- {
- sim_io_eprintf (SD, "FPR %d (format %s) being accessed with format %s - setting to unknown (PC = 0x%s)\n",
- fpr, fpu_format_name (FPR_STATE[fpr]),
- fpu_format_name (fmt), pr_addr (cia));
- FPR_STATE[fpr] = fmt_unknown;
+ }
+ else if (fmt != FPR_STATE[fpr])
+ {
+ sim_io_eprintf (SD, "FPR %d (format %s) being accessed with format %s - setting to unknown (PC = 0x%s)\n",
+ fpr, fpu_format_name (FPR_STATE[fpr]),
+ fpu_format_name (fmt), pr_addr (cia));
+ FPR_STATE[fpr] = fmt_unknown;
+ }
}
if (FPR_STATE[fpr] == fmt_unknown)
@@ -156,11 +159,13 @@ value_fpr (sim_cpu *cpu,
{
switch (fmt)
{
+ case fmt_uninterpreted_32:
case fmt_single:
case fmt_word:
value = (FGR[fpr] & 0xFFFFFFFF);
break;
+ case fmt_uninterpreted_64:
case fmt_uninterpreted:
case fmt_double:
case fmt_long:
@@ -177,11 +182,13 @@ value_fpr (sim_cpu *cpu,
{
switch (fmt)
{
+ case fmt_uninterpreted_32:
case fmt_single:
case fmt_word:
value = (FGR[fpr] & 0xFFFFFFFF);
break;
+ case fmt_uninterpreted_64:
case fmt_uninterpreted:
case fmt_double:
case fmt_long:
@@ -299,7 +306,7 @@ store_fpr (sim_cpu *cpu,
else
{
FPR_STATE[fpr] = fmt_unknown;
- FPR_STATE[fpr + 1] = fmt_unknown;
+ FPR_STATE[fpr ^ 1] = fmt_unknown;
SignalException (ReservedInstruction, 0);
}
break;