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| author | Andrew Cagney <cagney@redhat.com> | 1997-10-27 06:42:13 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-10-27 06:42:13 +0000 |
| commit | 90ad43b2deb869abb5621d94be990f0cb07379bd (patch) | |
| tree | d14fadf79e139853619faebd833c2cf95b1e99a1 /sim/mips/configure.in | |
| parent | e2880fadf387be9b6206a6fa174f069cd64a8a38 (diff) | |
| download | gdb-90ad43b2deb869abb5621d94be990f0cb07379bd.zip gdb-90ad43b2deb869abb5621d94be990f0cb07379bd.tar.gz gdb-90ad43b2deb869abb5621d94be990f0cb07379bd.tar.bz2 | |
Add mips64vr5400 to configuration list
Mark mipsIV instructions as being implemented by the vr5400.
Sanitize.
Diffstat (limited to 'sim/mips/configure.in')
| -rw-r--r-- | sim/mips/configure.in | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/sim/mips/configure.in b/sim/mips/configure.in index 38c05d9..c98b231 100644 --- a/sim/mips/configure.in +++ b/sim/mips/configure.in @@ -96,14 +96,17 @@ SIM_AC_OPTION_FLOAT($mips_fpu) # sim_gen=NO case "${target}" in +# start-sanitize-tx19 + mipstx19*-*-*) sim_gen=M16 ;; +# end-sanitize-tx19 # start-sanitize-r5900 # mips64r59*-*-*) sim_gen=IGEN ;; # end-sanitize-r5900 # start-sanitize-vr5400 -# mips64vr54*-*-*) sim_gen=IGEN ;; + mips64vr54*-*-*) sim_gen=IGEN ;; # end-sanitize-vr5400 # mips16*-*-*) sim_gen=M16 ;; - *) sim_gen=NO ;; + *) sim_gen=NO ;; esac AC_SUBST(sim_gen) |