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| author | Andrew Cagney <cagney@redhat.com> | 1997-10-27 07:55:24 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-10-27 07:55:24 +0000 |
| commit | 16bd5d6e527b13eee522e9c2afa8a24c37f53fc5 (patch) | |
| tree | a6e82ccf5cdd5d3930498dab64b3b3f7f27873a3 /sim/mips/configure.in | |
| parent | 90ad43b2deb869abb5621d94be990f0cb07379bd (diff) | |
| download | gdb-16bd5d6e527b13eee522e9c2afa8a24c37f53fc5.zip gdb-16bd5d6e527b13eee522e9c2afa8a24c37f53fc5.tar.gz gdb-16bd5d6e527b13eee522e9c2afa8a24c37f53fc5.tar.bz2 | |
Separate r5900 specifoc and mips16 instructions.
Add support for this to configure (vr5400 target only)
Diffstat (limited to 'sim/mips/configure.in')
| -rw-r--r-- | sim/mips/configure.in | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/sim/mips/configure.in b/sim/mips/configure.in index c98b231..49f0af6 100644 --- a/sim/mips/configure.in +++ b/sim/mips/configure.in @@ -95,20 +95,32 @@ SIM_AC_OPTION_FLOAT($mips_fpu) # Select the sim generator & architecture # sim_gen=NO +sim_igen_flags="-F 32,64,f -M mipsIV" +sim_m16_flags="-F 16 -M mips16" + case "${target}" in # start-sanitize-tx19 - mipstx19*-*-*) sim_gen=M16 ;; +# mipstx19*-*-*) sim_gen=M16 +# sim_igen_flags="-F 32,64,f -M tx19" +# sim_m16_flags="-F 16 -M tx19" +# ;; # end-sanitize-tx19 # start-sanitize-r5900 -# mips64r59*-*-*) sim_gen=IGEN ;; +# mips64r59*-*-*) sim_gen=IGEN +# sim_igen_flags="-F 32,64,f -M r5900" +# ;; # end-sanitize-r5900 # start-sanitize-vr5400 - mips64vr54*-*-*) sim_gen=IGEN ;; + mips64vr54*-*-*) sim_gen=IGEN + sim_igen_flags="-F 32,64,f -M vr5400" + ;; # end-sanitize-vr5400 # mips16*-*-*) sim_gen=M16 ;; *) sim_gen=NO ;; esac AC_SUBST(sim_gen) +AC_SUBST(sim_igen_flags) +AC_SUBST(sim_m16_flags) AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h) |