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author | Thiemo Seufer <ths@networkno.de> | 2007-02-13 20:20:54 +0000 |
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committer | Thiemo Seufer <ths@networkno.de> | 2007-02-13 20:20:54 +0000 |
commit | 109ad085730b300d946da8a6fa95eb7bb6828920 (patch) | |
tree | b5e82ba9a7290dd1e2246d8657ff47bc6b29153e /sim/mips/configure.ac | |
parent | 495f536a34c0546adf69e85e8df344cbb044156c (diff) | |
download | gdb-109ad085730b300d946da8a6fa95eb7bb6828920.zip gdb-109ad085730b300d946da8a6fa95eb7bb6828920.tar.gz gdb-109ad085730b300d946da8a6fa95eb7bb6828920.tar.bz2 |
* configure.ac: Add mips*-sde-elf* target.
* configure: Regenerate.
Diffstat (limited to 'sim/mips/configure.ac')
-rw-r--r-- | sim/mips/configure.ac | 23 |
1 files changed, 16 insertions, 7 deletions
diff --git a/sim/mips/configure.ac b/sim/mips/configure.ac index 19a9d49..3bdafff 100644 --- a/sim/mips/configure.ac +++ b/sim/mips/configure.ac @@ -25,6 +25,7 @@ SIM_AC_OPTION_RESERVED_BITS(1) case "${target}" in mips64vr*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;; mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; + mips*-sde-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; *) SIM_SUBTARGET="";; @@ -59,6 +60,7 @@ mips_addr_bitsize= case "${target}" in mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;; + mips*-sde-elf*) mips_bitsize=64 ; mips_msb=63 ;; mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;; mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;; @@ -79,6 +81,7 @@ case "${target}" in ;; mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;; mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;; + mips*-sde-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;; @@ -145,42 +148,48 @@ case "${target}" in sim_igen_filter="32,64,f" sim_m16_filter="16" ;; + mips*-sde-elf*) sim_gen=M16 + sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,dsp,smartmips" + sim_m16_machine="-M mips16,mips16e,mips64r2" + sim_igen_filter="32,64,f" + sim_mach_default="mipsisa64r2" + ;; mipsisa32r2*-*-*) sim_gen=M16 - sim_igen_machine="-M mips32r2,mips16,mips16e,dsp,smartmips" + sim_igen_machine="-M mips32r2,mips16,mips16e,dsp,smartmips" sim_m16_machine="-M mips16,mips16e,mips32r2" sim_igen_filter="32,f" sim_mach_default="mipsisa32r2" ;; mipsisa32*-*-*) sim_gen=M16 - sim_igen_machine="-M mips32,mips16,mips16e,dsp,smartmips" + sim_igen_machine="-M mips32,mips16,mips16e,dsp,smartmips" sim_m16_machine="-M mips16,mips16e,mips32" sim_igen_filter="32,f" sim_mach_default="mipsisa32" ;; mipsisa64r2*-*-*) sim_gen=M16 - sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,dsp" + sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,dsp" sim_m16_machine="-M mips16,mips16e,mips64r2" sim_igen_filter="32,64,f" sim_mach_default="mipsisa64r2" ;; mipsisa64sb1*-*-*) sim_gen=IGEN - sim_igen_machine="-M mips64,mips3d,sb1" + sim_igen_machine="-M mips64,mips3d,sb1" sim_igen_filter="32,64,f" sim_mach_default="mips_sb1" ;; mipsisa64*-*-*) sim_gen=M16 - sim_igen_machine="-M mips64,mips3d,mips16,mips16e,dsp" + sim_igen_machine="-M mips64,mips3d,mips16,mips16e,dsp" sim_m16_machine="-M mips16,mips16e,mips64" sim_igen_filter="32,64,f" sim_mach_default="mipsisa64" ;; - mips*lsi*) sim_gen=M16 + mips*lsi*) sim_gen=M16 sim_igen_machine="-M mipsIII,mips16" sim_m16_machine="-M mips16,mipsIII" sim_igen_filter="32,f" sim_m16_filter="16" sim_mach_default="mips4000" - ;; + ;; mips*-*-*) sim_gen=IGEN sim_igen_filter="32,f" ;; |