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| author | Andrew Cagney <cagney@redhat.com> | 1997-10-24 06:43:51 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-10-24 06:43:51 +0000 |
| commit | dad6f1f326c4ff68c7473a192fe9545818c479bb (patch) | |
| tree | fd0ee4de840adc147d1c7dc75eeffc8cebe3c02f /sim/mips/ChangeLog | |
| parent | 49a7683337cc5fe673ac9ae7f4da6330f1b01756 (diff) | |
| download | gdb-dad6f1f326c4ff68c7473a192fe9545818c479bb.zip gdb-dad6f1f326c4ff68c7473a192fe9545818c479bb.tar.gz gdb-dad6f1f326c4ff68c7473a192fe9545818c479bb.tar.bz2 | |
Add function to fetch 32bit instructions
When address translation of insn fetch fails raise exception immediatly.
Use address_word as type of all address variables (instead of unsigned64),
the former is configured as either 32 or 64 bit type.
Always compile fpu code (no #if has fpu)
Diffstat (limited to 'sim/mips/ChangeLog')
| -rw-r--r-- | sim/mips/ChangeLog | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index dc487a2..eae6d22 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,23 @@ +Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com> + + * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define. + + * interp.c (ColdReset): Remove #ifdef HASFPU, check + CURRENT_FLOATING_POINT instead. + + * interp.c (ifetch32): New function. Fetch 32 bit instruction. + (address_translation): Raise exception InstructionFetch when + translation fails and isINSTRUCTION. + + * interp.c (sim_open, sim_write, sim_monitor, store_word, + sim_engine_run): Change type of of vaddr and paddr to + address_word. + (address_translation, prefetch, load_memory, store_memory, + cache_op): Change type of vAddr and pAddr to address_word. + + * gencode.c (build_instruction): Change type of vaddr and paddr to + address_word. + Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com> * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT |