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| author | Andrew Cagney <cagney@redhat.com> | 1998-11-23 07:16:03 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1998-11-23 07:16:03 +0000 |
| commit | 57791952b6dd3a846918b2e10870b7e0cc9dbe93 (patch) | |
| tree | 927c6c57f84995bb39076ffa1343a72440322856 /sim/mips/ChangeLog | |
| parent | 3c5f200bd1a77e05650fa31137fb26a5ed38781f (diff) | |
| download | gdb-57791952b6dd3a846918b2e10870b7e0cc9dbe93.zip gdb-57791952b6dd3a846918b2e10870b7e0cc9dbe93.tar.gz gdb-57791952b6dd3a846918b2e10870b7e0cc9dbe93.tar.bz2 | |
Configure mips64vr4100-elf nee mips64vr41* as a 64 bit mips16 igen simulator.
Fix problems: All vr.igen instructions are 64 bit.
Diffstat (limited to 'sim/mips/ChangeLog')
| -rw-r--r-- | sim/mips/ChangeLog | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index b9058fb..2811a23 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,13 @@ +Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64 + bit mips16 igen simulator. + * configure: Re-generate. + + * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark + as part of vr4100 ISA. + * vr.igen: Mark all instructions as 64 bit only. + Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com> * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent): |