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| author | Stephane Carrez <stcarrez@nerim.fr> | 2002-08-13 07:46:09 +0000 |
|---|---|---|
| committer | Stephane Carrez <stcarrez@nerim.fr> | 2002-08-13 07:46:09 +0000 |
| commit | 63f36def60e0ebb54113a819db684887d036b387 (patch) | |
| tree | 9733144136e5c4f171c1dd6c92c1d1e0f664cfc2 /sim/m68hc11/interp.c | |
| parent | bed69f0439536ace7602fdfc7a04dde1dc68d31a (diff) | |
| download | gdb-63f36def60e0ebb54113a819db684887d036b387.zip gdb-63f36def60e0ebb54113a819db684887d036b387.tar.gz gdb-63f36def60e0ebb54113a819db684887d036b387.tar.bz2 | |
* m68hc11_sim.c (cpu_special): Handle call and rtc instructions.
* sim-main.h (M6812_CALL_INDIRECT): Add to enum.
(m6811_regs): Add page register.
(cpu_set_page, cpu_get_page): New macros.
(phys_to_virt): New function.
(cpu_get_indexed_operand_addr, cpu_return): Declare.
* gencode.c: Identify indirect addressing mode for call and fix daa.
(gen_function_entry): New param to tell if src8/dst8 locals are
necessary.
(gen_interpreter): Use it to avoid generation of unused variables.
* interp.c (sim_fetch_register): Allow to read page register; page
register, A, B and CCR are only 1 byte wide.
(sim_store_register): Likewise for writing.
Diffstat (limited to 'sim/m68hc11/interp.c')
| -rw-r--r-- | sim/m68hc11/interp.c | 23 |
1 files changed, 18 insertions, 5 deletions
diff --git a/sim/m68hc11/interp.c b/sim/m68hc11/interp.c index ee2acef..03b6db7 100644 --- a/sim/m68hc11/interp.c +++ b/sim/m68hc11/interp.c @@ -1,6 +1,6 @@ /* interp.c -- Simulator for Motorola 68HC11/68HC12 Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc. - Written by Stephane Carrez (stcarrez@worldnet.fr) + Written by Stephane Carrez (stcarrez@nerim.fr) This file is part of GDB, the GNU debugger. @@ -468,16 +468,19 @@ sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length) { sim_cpu *cpu; uint16 val; + int size = 2; cpu = STATE_CPU (sd, 0); switch (rn) { case A_REGNUM: val = cpu_get_a (cpu); + size = 1; break; case B_REGNUM: val = cpu_get_b (cpu); + size = 1; break; case D_REGNUM: @@ -502,6 +505,12 @@ sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length) case PSW_REGNUM: val = cpu_get_ccr (cpu); + size = 1; + break; + + case PAGE_REGNUM: + val = cpu_get_page (cpu); + size = 1; break; default: @@ -510,7 +519,7 @@ sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length) } memory[0] = val >> 8; memory[1] = val & 0x0FF; - return 2; + return size; } int @@ -533,11 +542,11 @@ sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length) case A_REGNUM: cpu_set_a (cpu, val); - break; + return 1; case B_REGNUM: cpu_set_b (cpu, val); - break; + return 1; case X_REGNUM: cpu_set_x (cpu, val); @@ -557,7 +566,11 @@ sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length) case PSW_REGNUM: cpu_set_ccr (cpu, val); - break; + return 1; + + case PAGE_REGNUM: + cpu_set_page (cpu, val); + return 1; default: break; |