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author | Stephane Carrez <stcarrez@nerim.fr> | 2001-07-22 12:33:58 +0000 |
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committer | Stephane Carrez <stcarrez@nerim.fr> | 2001-07-22 12:33:58 +0000 |
commit | 00d0c012efb0162f90f653473a54f6324cf81d06 (patch) | |
tree | 21b093c5bfac98b86a42f218d4227038c84da513 /sim/m68hc11/interp.c | |
parent | 308a7829db1295a841e4db5d903155de48b01fcf (diff) | |
download | gdb-00d0c012efb0162f90f653473a54f6324cf81d06.zip gdb-00d0c012efb0162f90f653473a54f6324cf81d06.tar.gz gdb-00d0c012efb0162f90f653473a54f6324cf81d06.tar.bz2 |
* Makefile.in (SIM_OBJS): Remove sim-resume.o
* interp.c (sim_resume): New function from sim-resume.c, install
the stepping event after having processed the pending ticks.
(has_stepped): Likewise.
(sim_info): Produce an output only if verbose or STATE_VERBOSE_P.
Diffstat (limited to 'sim/m68hc11/interp.c')
-rw-r--r-- | sim/m68hc11/interp.c | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/sim/m68hc11/interp.c b/sim/m68hc11/interp.c index e043992..c34facd 100644 --- a/sim/m68hc11/interp.c +++ b/sim/m68hc11/interp.c @@ -437,6 +437,10 @@ sim_info (SIM_DESC sd, int verbose) const char *cpu_type; const struct bfd_arch_info *arch; + /* Nothing to do if there is no verbose flag set. */ + if (verbose == 0 && STATE_VERBOSE_P (sd) == 0) + return; + arch = STATE_ARCHITECTURE (sd); if (arch->arch == bfd_arch_m68hc11) cpu_type = "68HC11"; @@ -601,3 +605,79 @@ sim_do_command (SIM_DESC sd, char *cmd) if (STATE_ARCHITECTURE (sd) != cpu->cpu_configured_arch) sim_hw_configure (sd); } + +/* Halt the simulator after just one instruction */ + +static void +has_stepped (SIM_DESC sd, + void *data) +{ + ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); + sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_stopped, SIM_SIGTRAP); +} + + +/* Generic resume - assumes the existance of sim_engine_run */ + +void +sim_resume (SIM_DESC sd, + int step, + int siggnal) +{ + sim_engine *engine = STATE_ENGINE (sd); + jmp_buf buf; + int jmpval; + + ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); + + /* we only want to be single stepping the simulator once */ + if (engine->stepper != NULL) + { + sim_events_deschedule (sd, engine->stepper); + engine->stepper = NULL; + } + sim_module_resume (sd); + + /* run/resume the simulator */ + engine->jmpbuf = &buf; + jmpval = setjmp (buf); + if (jmpval == sim_engine_start_jmpval + || jmpval == sim_engine_restart_jmpval) + { + int last_cpu_nr = sim_engine_last_cpu_nr (sd); + int next_cpu_nr = sim_engine_next_cpu_nr (sd); + int nr_cpus = sim_engine_nr_cpus (sd); + + sim_events_preprocess (sd, last_cpu_nr >= nr_cpus, next_cpu_nr >= nr_cpus); + if (next_cpu_nr >= nr_cpus) + next_cpu_nr = 0; + + /* Only deliver the siggnal ]sic] the first time through - don't + re-deliver any siggnal during a restart. */ + if (jmpval == sim_engine_restart_jmpval) + siggnal = 0; + + /* Install the stepping event after having processed some + pending events. This is necessary for HC11/HC12 simulator + because the tick counter is incremented by the number of cycles + the instruction took. Some pending ticks to process can still + be recorded internally by the simulator and sim_events_preprocess + will handle them. If the stepping event is inserted before, + these pending ticks will raise the event and the simulator will + stop without having executed any instruction. */ + if (step) + engine->stepper = sim_events_schedule (sd, 0, has_stepped, sd); + +#ifdef SIM_CPU_EXCEPTION_RESUME + { + sim_cpu* cpu = STATE_CPU (sd, next_cpu_nr); + SIM_CPU_EXCEPTION_RESUME(sd, cpu, siggnal); + } +#endif + + sim_engine_run (sd, next_cpu_nr, nr_cpus, siggnal); + } + engine->jmpbuf = NULL; + + sim_module_suspend (sd); +} |