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author | Andrew Cagney <cagney@redhat.com> | 2004-02-04 22:05:37 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 2004-02-04 22:05:37 +0000 |
commit | df2a9ff4793f6a09fdaa1281aad08792732b955d (patch) | |
tree | 345908272a1839624f9859687c253b6f8a9fe57d /sim/m32r | |
parent | baf92889ebd77dceec279733db08e537eefbff49 (diff) | |
download | gdb-df2a9ff4793f6a09fdaa1281aad08792732b955d.zip gdb-df2a9ff4793f6a09fdaa1281aad08792732b955d.tar.gz gdb-df2a9ff4793f6a09fdaa1281aad08792732b955d.tar.bz2 |
2004-02-04 Andrew Cagney <cagney@redhat.com>
Committed by Andrew Cagney.
* mloopx.in: Update copyright.
(xextract-pbb): Fixed trap for system calls operation in parallel.
* mloop2.in (xextract-pbb): Ditto.
Diffstat (limited to 'sim/m32r')
-rw-r--r-- | sim/m32r/ChangeLog | 7 | ||||
-rw-r--r-- | sim/m32r/mloop2.in | 74 | ||||
-rw-r--r-- | sim/m32r/mloopx.in | 74 |
3 files changed, 133 insertions, 22 deletions
diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog index 92cbd04..7c2294c 100644 --- a/sim/m32r/ChangeLog +++ b/sim/m32r/ChangeLog @@ -1,3 +1,10 @@ +2004-02-04 Andrew Cagney <cagney@redhat.com> + + Committed by Andrew Cagney. + * mloopx.in: Update copyright. + (xextract-pbb): Fixed trap for system calls operation in parallel. + * mloop2.in (xextract-pbb): Ditto. + 2003-12-19 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> * configure.in: Changed for dummy simulator of m32r-linux. diff --git a/sim/m32r/mloop2.in b/sim/m32r/mloop2.in index bb9b0b2..69c6ec7 100644 --- a/sim/m32r/mloop2.in +++ b/sim/m32r/mloop2.in @@ -1,5 +1,6 @@ # Simulator main loop for m32r2. -*- C -*- -# Copyright (C) 1996, 1997, 1998, 2003 Free Software Foundation, Inc. +# +# Copyright 1996, 1997, 1998, 2003, 2004 Free Software Foundation, Inc. # # This file is part of GDB, the GNU debugger. # @@ -289,15 +290,33 @@ cat <<EOF { if ((insn & 0x8000) != 0) /* parallel? */ { - /* Yep. Here's the "interesting" [sic] part. */ - idesc = emit_parallel (current_cpu, pc, insn, sc, 1); - sc += 3; - max_insns -= 3; + int up_count; + + if (((insn >> 16) & 0xfff0) == 0x10f0) + { + /* FIXME: No need to handle this sequentially if system + calls will be able to execute after second insn in + parallel. ( trap #num || insn ) */ + /* insn */ + idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff, + sc, 1, 0); + /* trap */ + emit_16 (current_cpu, pc, insn >> 16, sc + 1, 1, 0); + up_count = 2; + } + else + { + /* Yep. Here's the "interesting" [sic] part. */ + idesc = emit_parallel (current_cpu, pc, insn, sc, 1); + up_count = 3; + } + sc += up_count; + max_insns -= up_count; icount += 2; pc += 4; if (IDESC_CTI_P (idesc)) { - SET_CTI_VPC (sc - 3); + SET_CTI_VPC (sc - up_count); break; } } @@ -375,18 +394,51 @@ cat <<EOF Only emit before/after handlers if necessary. */ if (trace_p || profile_p) { - idesc = emit_full_parallel (current_cpu, pc, insn, sc, - trace_p, profile_p); + if (((insn >> 16) & 0xfff0) == 0x10f0) + { + /* FIXME: No need to handle this sequentially if + system calls will be able to execute after second + insn in parallel. ( trap #num || insn ) */ + /* insn */ + idesc = emit_full16 (current_cpu, pc + 2, + insn & 0x7fff, sc, 0, 0); + /* trap */ + emit_full16 (current_cpu, pc, insn >> 16, sc + 3, + 0, 0); + } + else + { + idesc = emit_full_parallel (current_cpu, pc, insn, + sc, trace_p, profile_p); + } cti_sc = sc + 1; sc += 6; max_insns -= 6; } else { - idesc = emit_parallel (current_cpu, pc, insn, sc, 0); + int up_count; + + if (((insn >> 16) & 0xfff0) == 0x10f0) + { + /* FIXME: No need to handle this sequentially if + system calls will be able to execute after second + insn in parallel. ( trap #num || insn ) */ + /* insn */ + idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff, + sc, 0, 0); + /* trap */ + emit_16 (current_cpu, pc, insn >> 16, sc + 1, 0, 0); + up_count = 2; + } + else + { + idesc = emit_parallel (current_cpu, pc, insn, sc, 0); + up_count = 3; + } cti_sc = sc; - sc += 3; - max_insns -= 3; + sc += up_count; + max_insns -= up_count; } icount += 2; pc += 4; diff --git a/sim/m32r/mloopx.in b/sim/m32r/mloopx.in index e1663f7..5ca20a1 100644 --- a/sim/m32r/mloopx.in +++ b/sim/m32r/mloopx.in @@ -1,5 +1,6 @@ # Simulator main loop for m32rx. -*- C -*- -# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. +# +# Copyright 1996, 1997, 1998, 2004 Free Software Foundation, Inc. # # This file is part of the GNU Simulators. # @@ -289,15 +290,33 @@ cat <<EOF { if ((insn & 0x8000) != 0) /* parallel? */ { - /* Yep. Here's the "interesting" [sic] part. */ - idesc = emit_parallel (current_cpu, pc, insn, sc, 1); - sc += 3; - max_insns -= 3; + int up_count; + + if (((insn >> 16) & 0xfff0) == 0x10f0) + { + /* FIXME: No need to handle this sequentially if system + calls will be able to execute after second insn in + parallel. ( trap #num || insn ) */ + /* insn */ + idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff, + sc, 1, 0); + /* trap */ + emit_16 (current_cpu, pc, insn >> 16, sc + 1, 1, 0); + up_count = 2; + } + else + { + /* Yep. Here's the "interesting" [sic] part. */ + idesc = emit_parallel (current_cpu, pc, insn, sc, 1); + up_count = 3; + } + sc += up_count; + max_insns -= up_count; icount += 2; pc += 4; if (IDESC_CTI_P (idesc)) { - SET_CTI_VPC (sc - 3); + SET_CTI_VPC (sc - up_count); break; } } @@ -375,18 +394,51 @@ cat <<EOF Only emit before/after handlers if necessary. */ if (trace_p || profile_p) { - idesc = emit_full_parallel (current_cpu, pc, insn, sc, - trace_p, profile_p); + if (((insn >> 16) & 0xfff0) == 0x10f0) + { + /* FIXME: No need to handle this sequentially if + system calls will be able to execute after second + insn in parallel. ( trap #num || insn ) */ + /* insn */ + idesc = emit_full16 (current_cpu, pc + 2, + insn & 0x7fff, sc, 0, 0); + /* trap */ + emit_full16 (current_cpu, pc, insn >> 16, sc + 3, + 0, 0); + } + else + { + idesc = emit_full_parallel (current_cpu, pc, insn, + sc, trace_p, profile_p); + } cti_sc = sc + 1; sc += 6; max_insns -= 6; } else { - idesc = emit_parallel (current_cpu, pc, insn, sc, 0); + int up_count; + + if (((insn >> 16) & 0xfff0) == 0x10f0) + { + /* FIXME: No need to handle this sequentially if + system calls will be able to execute after second + insn in parallel. ( trap #num || insn ) */ + /* insn */ + idesc = emit_16 (current_cpu, pc + 2, insn & 0x7fff, + sc, 0, 0); + /* trap */ + emit_16 (current_cpu, pc, insn >> 16, sc + 1, 0, 0); + up_count = 2; + } + else + { + idesc = emit_parallel (current_cpu, pc, insn, sc, 0); + up_count = 3; + } cti_sc = sc; - sc += 3; - max_insns -= 3; + sc += up_count; + max_insns -= up_count; } icount += 2; pc += 4; |