* arch.c,arch.h,cpuall.h: Regenerate.

	* cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
	* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Regenerate.

17 files changed, 265 insertions, 253 deletions

diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog
index 6ee9d85..532e024 100644
--- a/sim/m32r/ChangeLog
+++ b/sim/m32r/ChangeLog
@@ -1,3 +1,9 @@
+2002-12-19  Doug Evans  <dje@sebabeach.org>
+
+	* arch.c,arch.h,cpuall.h: Regenerate.
+	* cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
+	* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Regenerate.
+
 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 
 	* configure: Regenerated to track ../common/aclocal.m4 changes.
diff --git a/sim/m32r/arch.c b/sim/m32r/arch.c
index d6860c1..0c02abb 100644
--- a/sim/m32r/arch.c
+++ b/sim/m32r/arch.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
diff --git a/sim/m32r/arch.h b/sim/m32r/arch.h
index 9521f44..89aed24 100644
--- a/sim/m32r/arch.h
+++ b/sim/m32r/arch.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
diff --git a/sim/m32r/cpu.c b/sim/m32r/cpu.c
index d93943d..bdb7937 100644
--- a/sim/m32r/cpu.c
+++ b/sim/m32r/cpu.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
diff --git a/sim/m32r/cpu.h b/sim/m32r/cpu.h
index 6f9a3ff..738aa1d 100644
--- a/sim/m32r/cpu.h
+++ b/sim/m32r/cpu.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
diff --git a/sim/m32r/cpuall.h b/sim/m32r/cpuall.h
index 0c16b21..d60037b 100644
--- a/sim/m32r/cpuall.h
+++ b/sim/m32r/cpuall.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
diff --git a/sim/m32r/cpux.c b/sim/m32r/cpux.c
index 054828b..9329789 100644
--- a/sim/m32r/cpux.c
+++ b/sim/m32r/cpux.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
diff --git a/sim/m32r/cpux.h b/sim/m32r/cpux.h
index 2d5cab4..7fde2cc 100644
--- a/sim/m32r/cpux.h
+++ b/sim/m32r/cpux.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
diff --git a/sim/m32r/decode.c b/sim/m32r/decode.c
index 83c3a38..e3b82cd 100644
--- a/sim/m32r/decode.c
+++ b/sim/m32r/decode.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -33,7 +33,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
    teensy bit of cpu in the decoder.  Moving it to malloc space is trivial
    but won't be done until necessary (we don't currently support the runtime
    addition of instructions nor an SMP machine with different cpus).  */
-static IDESC m32rbf_insn_data[M32RBF_INSN_UNLOCK + 1];
+static IDESC m32rbf_insn_data[M32RBF_INSN__MAX];
 
 /* Commas between elements are contained in the macros.
    Some of these are conditionally compiled out.  */
@@ -186,7 +186,7 @@ m32rbf_init_idesc_table (SIM_CPU *cpu)
 {
   IDESC *id,*tabend;
   const struct insn_sem *t,*tend;
-  int tabsize = sizeof (m32rbf_insn_data) / sizeof (IDESC);
+  int tabsize = M32RBF_INSN__MAX;
   IDESC *table = m32rbf_insn_data;
 
   memset (table, 0, tabsize * sizeof (IDESC));
@@ -224,59 +224,59 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
       unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0)));
       switch (val)
       {
-      case 0 : itype = M32RBF_INSN_SUBV;goto extract_sfmt_addv;
-      case 1 : itype = M32RBF_INSN_SUBX;goto extract_sfmt_addx;
-      case 2 : itype = M32RBF_INSN_SUB;goto extract_sfmt_add;
-      case 3 : itype = M32RBF_INSN_NEG;goto extract_sfmt_mv;
-      case 4 : itype = M32RBF_INSN_CMP;goto extract_sfmt_cmp;
-      case 5 : itype = M32RBF_INSN_CMPU;goto extract_sfmt_cmp;
-      case 8 : itype = M32RBF_INSN_ADDV;goto extract_sfmt_addv;
-      case 9 : itype = M32RBF_INSN_ADDX;goto extract_sfmt_addx;
-      case 10 : itype = M32RBF_INSN_ADD;goto extract_sfmt_add;
-      case 11 : itype = M32RBF_INSN_NOT;goto extract_sfmt_mv;
-      case 12 : itype = M32RBF_INSN_AND;goto extract_sfmt_add;
-      case 13 : itype = M32RBF_INSN_XOR;goto extract_sfmt_add;
-      case 14 : itype = M32RBF_INSN_OR;goto extract_sfmt_add;
-      case 16 : itype = M32RBF_INSN_SRL;goto extract_sfmt_add;
-      case 18 : itype = M32RBF_INSN_SRA;goto extract_sfmt_add;
-      case 20 : itype = M32RBF_INSN_SLL;goto extract_sfmt_add;
-      case 22 : itype = M32RBF_INSN_MUL;goto extract_sfmt_add;
-      case 24 : itype = M32RBF_INSN_MV;goto extract_sfmt_mv;
-      case 25 : itype = M32RBF_INSN_MVFC;goto extract_sfmt_mvfc;
-      case 26 : itype = M32RBF_INSN_MVTC;goto extract_sfmt_mvtc;
+      case 0 : itype = M32RBF_INSN_SUBV; goto extract_sfmt_addv;
+      case 1 : itype = M32RBF_INSN_SUBX; goto extract_sfmt_addx;
+      case 2 : itype = M32RBF_INSN_SUB; goto extract_sfmt_add;
+      case 3 : itype = M32RBF_INSN_NEG; goto extract_sfmt_mv;
+      case 4 : itype = M32RBF_INSN_CMP; goto extract_sfmt_cmp;
+      case 5 : itype = M32RBF_INSN_CMPU; goto extract_sfmt_cmp;
+      case 8 : itype = M32RBF_INSN_ADDV; goto extract_sfmt_addv;
+      case 9 : itype = M32RBF_INSN_ADDX; goto extract_sfmt_addx;
+      case 10 : itype = M32RBF_INSN_ADD; goto extract_sfmt_add;
+      case 11 : itype = M32RBF_INSN_NOT; goto extract_sfmt_mv;
+      case 12 : itype = M32RBF_INSN_AND; goto extract_sfmt_add;
+      case 13 : itype = M32RBF_INSN_XOR; goto extract_sfmt_add;
+      case 14 : itype = M32RBF_INSN_OR; goto extract_sfmt_add;
+      case 16 : itype = M32RBF_INSN_SRL; goto extract_sfmt_add;
+      case 18 : itype = M32RBF_INSN_SRA; goto extract_sfmt_add;
+      case 20 : itype = M32RBF_INSN_SLL; goto extract_sfmt_add;
+      case 22 : itype = M32RBF_INSN_MUL; goto extract_sfmt_add;
+      case 24 : itype = M32RBF_INSN_MV; goto extract_sfmt_mv;
+      case 25 : itype = M32RBF_INSN_MVFC; goto extract_sfmt_mvfc;
+      case 26 : itype = M32RBF_INSN_MVTC; goto extract_sfmt_mvtc;
       case 28 :
         {
           unsigned int val = (((insn >> 8) & (1 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RBF_INSN_JL;goto extract_sfmt_jl;
-          case 1 : itype = M32RBF_INSN_JMP;goto extract_sfmt_jmp;
+          case 0 : itype = M32RBF_INSN_JL; goto extract_sfmt_jl;
+          case 1 : itype = M32RBF_INSN_JMP; goto extract_sfmt_jmp;
           default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 29 : itype = M32RBF_INSN_RTE;goto extract_sfmt_rte;
-      case 31 : itype = M32RBF_INSN_TRAP;goto extract_sfmt_trap;
-      case 32 : itype = M32RBF_INSN_STB;goto extract_sfmt_stb;
-      case 34 : itype = M32RBF_INSN_STH;goto extract_sfmt_sth;
-      case 36 : itype = M32RBF_INSN_ST;goto extract_sfmt_st;
-      case 37 : itype = M32RBF_INSN_UNLOCK;goto extract_sfmt_unlock;
-      case 38 : itype = M32RBF_INSN_ST_PLUS;goto extract_sfmt_st_plus;
-      case 39 : itype = M32RBF_INSN_ST_MINUS;goto extract_sfmt_st_plus;
-      case 40 : itype = M32RBF_INSN_LDB;goto extract_sfmt_ldb;
-      case 41 : itype = M32RBF_INSN_LDUB;goto extract_sfmt_ldb;
-      case 42 : itype = M32RBF_INSN_LDH;goto extract_sfmt_ldh;
-      case 43 : itype = M32RBF_INSN_LDUH;goto extract_sfmt_ldh;
-      case 44 : itype = M32RBF_INSN_LD;goto extract_sfmt_ld;
-      case 45 : itype = M32RBF_INSN_LOCK;goto extract_sfmt_lock;
-      case 46 : itype = M32RBF_INSN_LD_PLUS;goto extract_sfmt_ld_plus;
-      case 48 : itype = M32RBF_INSN_MULHI;goto extract_sfmt_mulhi;
-      case 49 : itype = M32RBF_INSN_MULLO;goto extract_sfmt_mulhi;
-      case 50 : itype = M32RBF_INSN_MULWHI;goto extract_sfmt_mulhi;
-      case 51 : itype = M32RBF_INSN_MULWLO;goto extract_sfmt_mulhi;
-      case 52 : itype = M32RBF_INSN_MACHI;goto extract_sfmt_machi;
-      case 53 : itype = M32RBF_INSN_MACLO;goto extract_sfmt_machi;
-      case 54 : itype = M32RBF_INSN_MACWHI;goto extract_sfmt_machi;
-      case 55 : itype = M32RBF_INSN_MACWLO;goto extract_sfmt_machi;
+      case 29 : itype = M32RBF_INSN_RTE; goto extract_sfmt_rte;
+      case 31 : itype = M32RBF_INSN_TRAP; goto extract_sfmt_trap;
+      case 32 : itype = M32RBF_INSN_STB; goto extract_sfmt_stb;
+      case 34 : itype = M32RBF_INSN_STH; goto extract_sfmt_sth;
+      case 36 : itype = M32RBF_INSN_ST; goto extract_sfmt_st;
+      case 37 : itype = M32RBF_INSN_UNLOCK; goto extract_sfmt_unlock;
+      case 38 : itype = M32RBF_INSN_ST_PLUS; goto extract_sfmt_st_plus;
+      case 39 : itype = M32RBF_INSN_ST_MINUS; goto extract_sfmt_st_plus;
+      case 40 : itype = M32RBF_INSN_LDB; goto extract_sfmt_ldb;
+      case 41 : itype = M32RBF_INSN_LDUB; goto extract_sfmt_ldb;
+      case 42 : itype = M32RBF_INSN_LDH; goto extract_sfmt_ldh;
+      case 43 : itype = M32RBF_INSN_LDUH; goto extract_sfmt_ldh;
+      case 44 : itype = M32RBF_INSN_LD; goto extract_sfmt_ld;
+      case 45 : itype = M32RBF_INSN_LOCK; goto extract_sfmt_lock;
+      case 46 : itype = M32RBF_INSN_LD_PLUS; goto extract_sfmt_ld_plus;
+      case 48 : itype = M32RBF_INSN_MULHI; goto extract_sfmt_mulhi;
+      case 49 : itype = M32RBF_INSN_MULLO; goto extract_sfmt_mulhi;
+      case 50 : itype = M32RBF_INSN_MULWHI; goto extract_sfmt_mulhi;
+      case 51 : itype = M32RBF_INSN_MULWLO; goto extract_sfmt_mulhi;
+      case 52 : itype = M32RBF_INSN_MACHI; goto extract_sfmt_machi;
+      case 53 : itype = M32RBF_INSN_MACLO; goto extract_sfmt_machi;
+      case 54 : itype = M32RBF_INSN_MACWHI; goto extract_sfmt_machi;
+      case 55 : itype = M32RBF_INSN_MACWLO; goto extract_sfmt_machi;
       case 64 : /* fall through */
       case 65 : /* fall through */
       case 66 : /* fall through */
@@ -292,33 +292,33 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 76 : /* fall through */
       case 77 : /* fall through */
       case 78 : /* fall through */
-      case 79 : itype = M32RBF_INSN_ADDI;goto extract_sfmt_addi;
+      case 79 : itype = M32RBF_INSN_ADDI; goto extract_sfmt_addi;
       case 80 : /* fall through */
-      case 81 : itype = M32RBF_INSN_SRLI;goto extract_sfmt_slli;
+      case 81 : itype = M32RBF_INSN_SRLI; goto extract_sfmt_slli;
       case 82 : /* fall through */
-      case 83 : itype = M32RBF_INSN_SRAI;goto extract_sfmt_slli;
+      case 83 : itype = M32RBF_INSN_SRAI; goto extract_sfmt_slli;
       case 84 : /* fall through */
-      case 85 : itype = M32RBF_INSN_SLLI;goto extract_sfmt_slli;
+      case 85 : itype = M32RBF_INSN_SLLI; goto extract_sfmt_slli;
       case 87 :
         {
           unsigned int val = (((insn >> 0) & (1 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RBF_INSN_MVTACHI;goto extract_sfmt_mvtachi;
-          case 1 : itype = M32RBF_INSN_MVTACLO;goto extract_sfmt_mvtachi;
+          case 0 : itype = M32RBF_INSN_MVTACHI; goto extract_sfmt_mvtachi;
+          case 1 : itype = M32RBF_INSN_MVTACLO; goto extract_sfmt_mvtachi;
           default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 88 : itype = M32RBF_INSN_RACH;goto extract_sfmt_rac;
-      case 89 : itype = M32RBF_INSN_RAC;goto extract_sfmt_rac;
+      case 88 : itype = M32RBF_INSN_RACH; goto extract_sfmt_rac;
+      case 89 : itype = M32RBF_INSN_RAC; goto extract_sfmt_rac;
       case 95 :
         {
           unsigned int val = (((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RBF_INSN_MVFACHI;goto extract_sfmt_mvfachi;
-          case 1 : itype = M32RBF_INSN_MVFACLO;goto extract_sfmt_mvfachi;
-          case 2 : itype = M32RBF_INSN_MVFACMI;goto extract_sfmt_mvfachi;
+          case 0 : itype = M32RBF_INSN_MVFACHI; goto extract_sfmt_mvfachi;
+          case 1 : itype = M32RBF_INSN_MVFACLO; goto extract_sfmt_mvfachi;
+          case 2 : itype = M32RBF_INSN_MVFACMI; goto extract_sfmt_mvfachi;
           default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -337,17 +337,17 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 108 : /* fall through */
       case 109 : /* fall through */
       case 110 : /* fall through */
-      case 111 : itype = M32RBF_INSN_LDI8;goto extract_sfmt_ldi8;
+      case 111 : itype = M32RBF_INSN_LDI8; goto extract_sfmt_ldi8;
       case 112 :
         {
           unsigned int val = (((insn >> 8) & (15 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RBF_INSN_NOP;goto extract_sfmt_nop;
-          case 12 : itype = M32RBF_INSN_BC8;goto extract_sfmt_bc8;
-          case 13 : itype = M32RBF_INSN_BNC8;goto extract_sfmt_bc8;
-          case 14 : itype = M32RBF_INSN_BL8;goto extract_sfmt_bl8;
-          case 15 : itype = M32RBF_INSN_BRA8;goto extract_sfmt_bra8;
+          case 0 : itype = M32RBF_INSN_NOP; goto extract_sfmt_nop;
+          case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8;
+          case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8;
+          case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8;
+          case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8;
           default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -370,45 +370,45 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 8) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RBF_INSN_BC8;goto extract_sfmt_bc8;
-          case 1 : itype = M32RBF_INSN_BNC8;goto extract_sfmt_bc8;
-          case 2 : itype = M32RBF_INSN_BL8;goto extract_sfmt_bl8;
-          case 3 : itype = M32RBF_INSN_BRA8;goto extract_sfmt_bra8;
+          case 0 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8;
+          case 1 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8;
+          case 2 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8;
+          case 3 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8;
           default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 132 : itype = M32RBF_INSN_CMPI;goto extract_sfmt_cmpi;
-      case 133 : itype = M32RBF_INSN_CMPUI;goto extract_sfmt_cmpi;
-      case 136 : itype = M32RBF_INSN_ADDV3;goto extract_sfmt_addv3;
-      case 138 : itype = M32RBF_INSN_ADD3;goto extract_sfmt_add3;
-      case 140 : itype = M32RBF_INSN_AND3;goto extract_sfmt_and3;
-      case 141 : itype = M32RBF_INSN_XOR3;goto extract_sfmt_and3;
-      case 142 : itype = M32RBF_INSN_OR3;goto extract_sfmt_or3;
-      case 144 : itype = M32RBF_INSN_DIV;goto extract_sfmt_div;
-      case 145 : itype = M32RBF_INSN_DIVU;goto extract_sfmt_div;
-      case 146 : itype = M32RBF_INSN_REM;goto extract_sfmt_div;
-      case 147 : itype = M32RBF_INSN_REMU;goto extract_sfmt_div;
-      case 152 : itype = M32RBF_INSN_SRL3;goto extract_sfmt_sll3;
-      case 154 : itype = M32RBF_INSN_SRA3;goto extract_sfmt_sll3;
-      case 156 : itype = M32RBF_INSN_SLL3;goto extract_sfmt_sll3;
-      case 159 : itype = M32RBF_INSN_LDI16;goto extract_sfmt_ldi16;
-      case 160 : itype = M32RBF_INSN_STB_D;goto extract_sfmt_stb_d;
-      case 162 : itype = M32RBF_INSN_STH_D;goto extract_sfmt_sth_d;
-      case 164 : itype = M32RBF_INSN_ST_D;goto extract_sfmt_st_d;
-      case 168 : itype = M32RBF_INSN_LDB_D;goto extract_sfmt_ldb_d;
-      case 169 : itype = M32RBF_INSN_LDUB_D;goto extract_sfmt_ldb_d;
-      case 170 : itype = M32RBF_INSN_LDH_D;goto extract_sfmt_ldh_d;
-      case 171 : itype = M32RBF_INSN_LDUH_D;goto extract_sfmt_ldh_d;
-      case 172 : itype = M32RBF_INSN_LD_D;goto extract_sfmt_ld_d;
-      case 176 : itype = M32RBF_INSN_BEQ;goto extract_sfmt_beq;
-      case 177 : itype = M32RBF_INSN_BNE;goto extract_sfmt_beq;
-      case 184 : itype = M32RBF_INSN_BEQZ;goto extract_sfmt_beqz;
-      case 185 : itype = M32RBF_INSN_BNEZ;goto extract_sfmt_beqz;
-      case 186 : itype = M32RBF_INSN_BLTZ;goto extract_sfmt_beqz;
-      case 187 : itype = M32RBF_INSN_BGEZ;goto extract_sfmt_beqz;
-      case 188 : itype = M32RBF_INSN_BLEZ;goto extract_sfmt_beqz;
-      case 189 : itype = M32RBF_INSN_BGTZ;goto extract_sfmt_beqz;
-      case 220 : itype = M32RBF_INSN_SETH;goto extract_sfmt_seth;
+      case 132 : itype = M32RBF_INSN_CMPI; goto extract_sfmt_cmpi;
+      case 133 : itype = M32RBF_INSN_CMPUI; goto extract_sfmt_cmpi;
+      case 136 : itype = M32RBF_INSN_ADDV3; goto extract_sfmt_addv3;
+      case 138 : itype = M32RBF_INSN_ADD3; goto extract_sfmt_add3;
+      case 140 : itype = M32RBF_INSN_AND3; goto extract_sfmt_and3;
+      case 141 : itype = M32RBF_INSN_XOR3; goto extract_sfmt_and3;
+      case 142 : itype = M32RBF_INSN_OR3; goto extract_sfmt_or3;
+      case 144 : itype = M32RBF_INSN_DIV; goto extract_sfmt_div;
+      case 145 : itype = M32RBF_INSN_DIVU; goto extract_sfmt_div;
+      case 146 : itype = M32RBF_INSN_REM; goto extract_sfmt_div;
+      case 147 : itype = M32RBF_INSN_REMU; goto extract_sfmt_div;
+      case 152 : itype = M32RBF_INSN_SRL3; goto extract_sfmt_sll3;
+      case 154 : itype = M32RBF_INSN_SRA3; goto extract_sfmt_sll3;
+      case 156 : itype = M32RBF_INSN_SLL3; goto extract_sfmt_sll3;
+      case 159 : itype = M32RBF_INSN_LDI16; goto extract_sfmt_ldi16;
+      case 160 : itype = M32RBF_INSN_STB_D; goto extract_sfmt_stb_d;
+      case 162 : itype = M32RBF_INSN_STH_D; goto extract_sfmt_sth_d;
+      case 164 : itype = M32RBF_INSN_ST_D; goto extract_sfmt_st_d;
+      case 168 : itype = M32RBF_INSN_LDB_D; goto extract_sfmt_ldb_d;
+      case 169 : itype = M32RBF_INSN_LDUB_D; goto extract_sfmt_ldb_d;
+      case 170 : itype = M32RBF_INSN_LDH_D; goto extract_sfmt_ldh_d;
+      case 171 : itype = M32RBF_INSN_LDUH_D; goto extract_sfmt_ldh_d;
+      case 172 : itype = M32RBF_INSN_LD_D; goto extract_sfmt_ld_d;
+      case 176 : itype = M32RBF_INSN_BEQ; goto extract_sfmt_beq;
+      case 177 : itype = M32RBF_INSN_BNE; goto extract_sfmt_beq;
+      case 184 : itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz;
+      case 185 : itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz;
+      case 186 : itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz;
+      case 187 : itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz;
+      case 188 : itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz;
+      case 189 : itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz;
+      case 220 : itype = M32RBF_INSN_SETH; goto extract_sfmt_seth;
       case 224 : /* fall through */
       case 225 : /* fall through */
       case 226 : /* fall through */
@@ -424,7 +424,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 236 : /* fall through */
       case 237 : /* fall through */
       case 238 : /* fall through */
-      case 239 : itype = M32RBF_INSN_LD24;goto extract_sfmt_ld24;
+      case 239 : itype = M32RBF_INSN_LD24; goto extract_sfmt_ld24;
       case 240 : /* fall through */
       case 241 : /* fall through */
       case 242 : /* fall through */
@@ -445,10 +445,10 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 8) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RBF_INSN_BC24;goto extract_sfmt_bc24;
-          case 1 : itype = M32RBF_INSN_BNC24;goto extract_sfmt_bc24;
-          case 2 : itype = M32RBF_INSN_BL24;goto extract_sfmt_bl24;
-          case 3 : itype = M32RBF_INSN_BRA24;goto extract_sfmt_bra24;
+          case 0 : itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24;
+          case 1 : itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24;
+          case 2 : itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24;
+          case 3 : itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24;
           default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
diff --git a/sim/m32r/decode.h b/sim/m32r/decode.h
index 1450667..f7a2237 100644
--- a/sim/m32r/decode.h
+++ b/sim/m32r/decode.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -60,7 +60,7 @@ typedef enum m32rbf_insn_type {
  , M32RBF_INSN_ST, M32RBF_INSN_ST_D, M32RBF_INSN_STB, M32RBF_INSN_STB_D
  , M32RBF_INSN_STH, M32RBF_INSN_STH_D, M32RBF_INSN_ST_PLUS, M32RBF_INSN_ST_MINUS
  , M32RBF_INSN_SUB, M32RBF_INSN_SUBV, M32RBF_INSN_SUBX, M32RBF_INSN_TRAP
- , M32RBF_INSN_UNLOCK, M32RBF_INSN_MAX
+ , M32RBF_INSN_UNLOCK, M32RBF_INSN__MAX
 } M32RBF_INSN_TYPE;
 
 /* Enum declaration for semantic formats in cpu family m32rbf.  */
diff --git a/sim/m32r/decodex.c b/sim/m32r/decodex.c
index 336ba3a..06317f0 100644
--- a/sim/m32r/decodex.c
+++ b/sim/m32r/decodex.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -37,7 +37,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
    teensy bit of cpu in the decoder.  Moving it to malloc space is trivial
    but won't be done until necessary (we don't currently support the runtime
    addition of instructions nor an SMP machine with different cpus).  */
-static IDESC m32rxf_insn_data[M32RXF_INSN_SNC + 1];
+static IDESC m32rxf_insn_data[M32RXF_INSN__MAX];
 
 /* Commas between elements are contained in the macros.
    Some of these are conditionally compiled out.  */
@@ -210,7 +210,7 @@ m32rxf_init_idesc_table (SIM_CPU *cpu)
 {
   IDESC *id,*tabend;
   const struct insn_sem *t,*tend;
-  int tabsize = sizeof (m32rxf_insn_data) / sizeof (IDESC);
+  int tabsize = M32RXF_INSN__MAX;
   IDESC *table = m32rxf_insn_data;
 
   memset (table, 0, tabsize * sizeof (IDESC));
@@ -258,80 +258,80 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
       unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0)));
       switch (val)
       {
-      case 0 : itype = M32RXF_INSN_SUBV;goto extract_sfmt_addv;
-      case 1 : itype = M32RXF_INSN_SUBX;goto extract_sfmt_addx;
-      case 2 : itype = M32RXF_INSN_SUB;goto extract_sfmt_add;
-      case 3 : itype = M32RXF_INSN_NEG;goto extract_sfmt_mv;
-      case 4 : itype = M32RXF_INSN_CMP;goto extract_sfmt_cmp;
-      case 5 : itype = M32RXF_INSN_CMPU;goto extract_sfmt_cmp;
-      case 6 : itype = M32RXF_INSN_CMPEQ;goto extract_sfmt_cmp;
+      case 0 : itype = M32RXF_INSN_SUBV; goto extract_sfmt_addv;
+      case 1 : itype = M32RXF_INSN_SUBX; goto extract_sfmt_addx;
+      case 2 : itype = M32RXF_INSN_SUB; goto extract_sfmt_add;
+      case 3 : itype = M32RXF_INSN_NEG; goto extract_sfmt_mv;
+      case 4 : itype = M32RXF_INSN_CMP; goto extract_sfmt_cmp;
+      case 5 : itype = M32RXF_INSN_CMPU; goto extract_sfmt_cmp;
+      case 6 : itype = M32RXF_INSN_CMPEQ; goto extract_sfmt_cmp;
       case 7 :
         {
           unsigned int val = (((insn >> 8) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RXF_INSN_CMPZ;goto extract_sfmt_cmpz;
-          case 3 : itype = M32RXF_INSN_PCMPBZ;goto extract_sfmt_cmpz;
+          case 0 : itype = M32RXF_INSN_CMPZ; goto extract_sfmt_cmpz;
+          case 3 : itype = M32RXF_INSN_PCMPBZ; goto extract_sfmt_cmpz;
           default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 8 : itype = M32RXF_INSN_ADDV;goto extract_sfmt_addv;
-      case 9 : itype = M32RXF_INSN_ADDX;goto extract_sfmt_addx;
-      case 10 : itype = M32RXF_INSN_ADD;goto extract_sfmt_add;
-      case 11 : itype = M32RXF_INSN_NOT;goto extract_sfmt_mv;
-      case 12 : itype = M32RXF_INSN_AND;goto extract_sfmt_add;
-      case 13 : itype = M32RXF_INSN_XOR;goto extract_sfmt_add;
-      case 14 : itype = M32RXF_INSN_OR;goto extract_sfmt_add;
-      case 16 : itype = M32RXF_INSN_SRL;goto extract_sfmt_add;
-      case 18 : itype = M32RXF_INSN_SRA;goto extract_sfmt_add;
-      case 20 : itype = M32RXF_INSN_SLL;goto extract_sfmt_add;
-      case 22 : itype = M32RXF_INSN_MUL;goto extract_sfmt_add;
-      case 24 : itype = M32RXF_INSN_MV;goto extract_sfmt_mv;
-      case 25 : itype = M32RXF_INSN_MVFC;goto extract_sfmt_mvfc;
-      case 26 : itype = M32RXF_INSN_MVTC;goto extract_sfmt_mvtc;
+      case 8 : itype = M32RXF_INSN_ADDV; goto extract_sfmt_addv;
+      case 9 : itype = M32RXF_INSN_ADDX; goto extract_sfmt_addx;
+      case 10 : itype = M32RXF_INSN_ADD; goto extract_sfmt_add;
+      case 11 : itype = M32RXF_INSN_NOT; goto extract_sfmt_mv;
+      case 12 : itype = M32RXF_INSN_AND; goto extract_sfmt_add;
+      case 13 : itype = M32RXF_INSN_XOR; goto extract_sfmt_add;
+      case 14 : itype = M32RXF_INSN_OR; goto extract_sfmt_add;
+      case 16 : itype = M32RXF_INSN_SRL; goto extract_sfmt_add;
+      case 18 : itype = M32RXF_INSN_SRA; goto extract_sfmt_add;
+      case 20 : itype = M32RXF_INSN_SLL; goto extract_sfmt_add;
+      case 22 : itype = M32RXF_INSN_MUL; goto extract_sfmt_add;
+      case 24 : itype = M32RXF_INSN_MV; goto extract_sfmt_mv;
+      case 25 : itype = M32RXF_INSN_MVFC; goto extract_sfmt_mvfc;
+      case 26 : itype = M32RXF_INSN_MVTC; goto extract_sfmt_mvtc;
       case 28 :
         {
           unsigned int val = (((insn >> 8) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RXF_INSN_JC;goto extract_sfmt_jc;
-          case 1 : itype = M32RXF_INSN_JNC;goto extract_sfmt_jc;
-          case 2 : itype = M32RXF_INSN_JL;goto extract_sfmt_jl;
-          case 3 : itype = M32RXF_INSN_JMP;goto extract_sfmt_jmp;
+          case 0 : itype = M32RXF_INSN_JC; goto extract_sfmt_jc;
+          case 1 : itype = M32RXF_INSN_JNC; goto extract_sfmt_jc;
+          case 2 : itype = M32RXF_INSN_JL; goto extract_sfmt_jl;
+          case 3 : itype = M32RXF_INSN_JMP; goto extract_sfmt_jmp;
           default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 29 : itype = M32RXF_INSN_RTE;goto extract_sfmt_rte;
-      case 31 : itype = M32RXF_INSN_TRAP;goto extract_sfmt_trap;
-      case 32 : itype = M32RXF_INSN_STB;goto extract_sfmt_stb;
-      case 34 : itype = M32RXF_INSN_STH;goto extract_sfmt_sth;
-      case 36 : itype = M32RXF_INSN_ST;goto extract_sfmt_st;
-      case 37 : itype = M32RXF_INSN_UNLOCK;goto extract_sfmt_unlock;
-      case 38 : itype = M32RXF_INSN_ST_PLUS;goto extract_sfmt_st_plus;
-      case 39 : itype = M32RXF_INSN_ST_MINUS;goto extract_sfmt_st_plus;
-      case 40 : itype = M32RXF_INSN_LDB;goto extract_sfmt_ldb;
-      case 41 : itype = M32RXF_INSN_LDUB;goto extract_sfmt_ldb;
-      case 42 : itype = M32RXF_INSN_LDH;goto extract_sfmt_ldh;
-      case 43 : itype = M32RXF_INSN_LDUH;goto extract_sfmt_ldh;
-      case 44 : itype = M32RXF_INSN_LD;goto extract_sfmt_ld;
-      case 45 : itype = M32RXF_INSN_LOCK;goto extract_sfmt_lock;
-      case 46 : itype = M32RXF_INSN_LD_PLUS;goto extract_sfmt_ld_plus;
+      case 29 : itype = M32RXF_INSN_RTE; goto extract_sfmt_rte;
+      case 31 : itype = M32RXF_INSN_TRAP; goto extract_sfmt_trap;
+      case 32 : itype = M32RXF_INSN_STB; goto extract_sfmt_stb;
+      case 34 : itype = M32RXF_INSN_STH; goto extract_sfmt_sth;
+      case 36 : itype = M32RXF_INSN_ST; goto extract_sfmt_st;
+      case 37 : itype = M32RXF_INSN_UNLOCK; goto extract_sfmt_unlock;
+      case 38 : itype = M32RXF_INSN_ST_PLUS; goto extract_sfmt_st_plus;
+      case 39 : itype = M32RXF_INSN_ST_MINUS; goto extract_sfmt_st_plus;
+      case 40 : itype = M32RXF_INSN_LDB; goto extract_sfmt_ldb;
+      case 41 : itype = M32RXF_INSN_LDUB; goto extract_sfmt_ldb;
+      case 42 : itype = M32RXF_INSN_LDH; goto extract_sfmt_ldh;
+      case 43 : itype = M32RXF_INSN_LDUH; goto extract_sfmt_ldh;
+      case 44 : itype = M32RXF_INSN_LD; goto extract_sfmt_ld;
+      case 45 : itype = M32RXF_INSN_LOCK; goto extract_sfmt_lock;
+      case 46 : itype = M32RXF_INSN_LD_PLUS; goto extract_sfmt_ld_plus;
       case 48 : /* fall through */
-      case 56 : itype = M32RXF_INSN_MULHI_A;goto extract_sfmt_mulhi_a;
+      case 56 : itype = M32RXF_INSN_MULHI_A; goto extract_sfmt_mulhi_a;
       case 49 : /* fall through */
-      case 57 : itype = M32RXF_INSN_MULLO_A;goto extract_sfmt_mulhi_a;
+      case 57 : itype = M32RXF_INSN_MULLO_A; goto extract_sfmt_mulhi_a;
       case 50 : /* fall through */
-      case 58 : itype = M32RXF_INSN_MULWHI_A;goto extract_sfmt_mulhi_a;
+      case 58 : itype = M32RXF_INSN_MULWHI_A; goto extract_sfmt_mulhi_a;
       case 51 : /* fall through */
-      case 59 : itype = M32RXF_INSN_MULWLO_A;goto extract_sfmt_mulhi_a;
+      case 59 : itype = M32RXF_INSN_MULWLO_A; goto extract_sfmt_mulhi_a;
       case 52 : /* fall through */
-      case 60 : itype = M32RXF_INSN_MACHI_A;goto extract_sfmt_machi_a;
+      case 60 : itype = M32RXF_INSN_MACHI_A; goto extract_sfmt_machi_a;
       case 53 : /* fall through */
-      case 61 : itype = M32RXF_INSN_MACLO_A;goto extract_sfmt_machi_a;
+      case 61 : itype = M32RXF_INSN_MACLO_A; goto extract_sfmt_machi_a;
       case 54 : /* fall through */
-      case 62 : itype = M32RXF_INSN_MACWHI_A;goto extract_sfmt_machi_a;
+      case 62 : itype = M32RXF_INSN_MACWHI_A; goto extract_sfmt_machi_a;
       case 55 : /* fall through */
-      case 63 : itype = M32RXF_INSN_MACWLO_A;goto extract_sfmt_machi_a;
+      case 63 : itype = M32RXF_INSN_MACWLO_A; goto extract_sfmt_machi_a;
       case 64 : /* fall through */
       case 65 : /* fall through */
       case 66 : /* fall through */
@@ -347,38 +347,38 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 76 : /* fall through */
       case 77 : /* fall through */
       case 78 : /* fall through */
-      case 79 : itype = M32RXF_INSN_ADDI;goto extract_sfmt_addi;
+      case 79 : itype = M32RXF_INSN_ADDI; goto extract_sfmt_addi;
       case 80 : /* fall through */
-      case 81 : itype = M32RXF_INSN_SRLI;goto extract_sfmt_slli;
+      case 81 : itype = M32RXF_INSN_SRLI; goto extract_sfmt_slli;
       case 82 : /* fall through */
-      case 83 : itype = M32RXF_INSN_SRAI;goto extract_sfmt_slli;
+      case 83 : itype = M32RXF_INSN_SRAI; goto extract_sfmt_slli;
       case 84 : /* fall through */
-      case 85 : itype = M32RXF_INSN_SLLI;goto extract_sfmt_slli;
+      case 85 : itype = M32RXF_INSN_SLLI; goto extract_sfmt_slli;
       case 87 :
         {
           unsigned int val = (((insn >> 0) & (1 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RXF_INSN_MVTACHI_A;goto extract_sfmt_mvtachi_a;
-          case 1 : itype = M32RXF_INSN_MVTACLO_A;goto extract_sfmt_mvtachi_a;
+          case 0 : itype = M32RXF_INSN_MVTACHI_A; goto extract_sfmt_mvtachi_a;
+          case 1 : itype = M32RXF_INSN_MVTACLO_A; goto extract_sfmt_mvtachi_a;
           default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 88 : itype = M32RXF_INSN_RACH_DSI;goto extract_sfmt_rac_dsi;
-      case 89 : itype = M32RXF_INSN_RAC_DSI;goto extract_sfmt_rac_dsi;
-      case 90 : itype = M32RXF_INSN_MULWU1;goto extract_sfmt_mulwu1;
-      case 91 : itype = M32RXF_INSN_MACWU1;goto extract_sfmt_macwu1;
-      case 92 : itype = M32RXF_INSN_MACLH1;goto extract_sfmt_macwu1;
-      case 93 : itype = M32RXF_INSN_MSBLO;goto extract_sfmt_msblo;
-      case 94 : itype = M32RXF_INSN_SADD;goto extract_sfmt_sadd;
+      case 88 : itype = M32RXF_INSN_RACH_DSI; goto extract_sfmt_rac_dsi;
+      case 89 : itype = M32RXF_INSN_RAC_DSI; goto extract_sfmt_rac_dsi;
+      case 90 : itype = M32RXF_INSN_MULWU1; goto extract_sfmt_mulwu1;
+      case 91 : itype = M32RXF_INSN_MACWU1; goto extract_sfmt_macwu1;
+      case 92 : itype = M32RXF_INSN_MACLH1; goto extract_sfmt_macwu1;
+      case 93 : itype = M32RXF_INSN_MSBLO; goto extract_sfmt_msblo;
+      case 94 : itype = M32RXF_INSN_SADD; goto extract_sfmt_sadd;
       case 95 :
         {
           unsigned int val = (((insn >> 0) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RXF_INSN_MVFACHI_A;goto extract_sfmt_mvfachi_a;
-          case 1 : itype = M32RXF_INSN_MVFACLO_A;goto extract_sfmt_mvfachi_a;
-          case 2 : itype = M32RXF_INSN_MVFACMI_A;goto extract_sfmt_mvfachi_a;
+          case 0 : itype = M32RXF_INSN_MVFACHI_A; goto extract_sfmt_mvfachi_a;
+          case 1 : itype = M32RXF_INSN_MVFACLO_A; goto extract_sfmt_mvfachi_a;
+          case 2 : itype = M32RXF_INSN_MVFACMI_A; goto extract_sfmt_mvfachi_a;
           default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -397,21 +397,27 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 108 : /* fall through */
       case 109 : /* fall through */
       case 110 : /* fall through */
-      case 111 : itype = M32RXF_INSN_LDI8;goto extract_sfmt_ldi8;
+      case 111 : itype = M32RXF_INSN_LDI8; goto extract_sfmt_ldi8;
       case 112 :
         {
-          unsigned int val = (((insn >> 8) & (15 << 0)));
+          unsigned int val = (((insn >> 7) & (15 << 1)) | ((insn >> 0) & (1 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RXF_INSN_NOP;goto extract_sfmt_nop;
-          case 4 : itype = M32RXF_INSN_SC;goto extract_sfmt_sc;
-          case 5 : itype = M32RXF_INSN_SNC;goto extract_sfmt_sc;
-          case 8 : itype = M32RXF_INSN_BCL8;goto extract_sfmt_bcl8;
-          case 9 : itype = M32RXF_INSN_BNCL8;goto extract_sfmt_bcl8;
-          case 12 : itype = M32RXF_INSN_BC8;goto extract_sfmt_bc8;
-          case 13 : itype = M32RXF_INSN_BNC8;goto extract_sfmt_bc8;
-          case 14 : itype = M32RXF_INSN_BL8;goto extract_sfmt_bl8;
-          case 15 : itype = M32RXF_INSN_BRA8;goto extract_sfmt_bra8;
+          case 0 : itype = M32RXF_INSN_NOP; goto extract_sfmt_nop;
+          case 9 : itype = M32RXF_INSN_SC; goto extract_sfmt_sc;
+          case 11 : itype = M32RXF_INSN_SNC; goto extract_sfmt_sc;
+          case 16 : /* fall through */
+          case 17 : itype = M32RXF_INSN_BCL8; goto extract_sfmt_bcl8;
+          case 18 : /* fall through */
+          case 19 : itype = M32RXF_INSN_BNCL8; goto extract_sfmt_bcl8;
+          case 24 : /* fall through */
+          case 25 : itype = M32RXF_INSN_BC8; goto extract_sfmt_bc8;
+          case 26 : /* fall through */
+          case 27 : itype = M32RXF_INSN_BNC8; goto extract_sfmt_bc8;
+          case 28 : /* fall through */
+          case 29 : itype = M32RXF_INSN_BL8; goto extract_sfmt_bl8;
+          case 30 : /* fall through */
+          case 31 : itype = M32RXF_INSN_BRA8; goto extract_sfmt_bra8;
           default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -434,67 +440,67 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 8) & (7 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RXF_INSN_BCL8;goto extract_sfmt_bcl8;
-          case 1 : itype = M32RXF_INSN_BNCL8;goto extract_sfmt_bcl8;
-          case 4 : itype = M32RXF_INSN_BC8;goto extract_sfmt_bc8;
-          case 5 : itype = M32RXF_INSN_BNC8;goto extract_sfmt_bc8;
-          case 6 : itype = M32RXF_INSN_BL8;goto extract_sfmt_bl8;
-          case 7 : itype = M32RXF_INSN_BRA8;goto extract_sfmt_bra8;
+          case 0 : itype = M32RXF_INSN_BCL8; goto extract_sfmt_bcl8;
+          case 1 : itype = M32RXF_INSN_BNCL8; goto extract_sfmt_bcl8;
+          case 4 : itype = M32RXF_INSN_BC8; goto extract_sfmt_bc8;
+          case 5 : itype = M32RXF_INSN_BNC8; goto extract_sfmt_bc8;
+          case 6 : itype = M32RXF_INSN_BL8; goto extract_sfmt_bl8;
+          case 7 : itype = M32RXF_INSN_BRA8; goto extract_sfmt_bra8;
           default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 132 : itype = M32RXF_INSN_CMPI;goto extract_sfmt_cmpi;
-      case 133 : itype = M32RXF_INSN_CMPUI;goto extract_sfmt_cmpi;
+      case 132 : itype = M32RXF_INSN_CMPI; goto extract_sfmt_cmpi;
+      case 133 : itype = M32RXF_INSN_CMPUI; goto extract_sfmt_cmpi;
       case 134 :
         {
           unsigned int val = (((insn >> -8) & (3 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RXF_INSN_SAT;goto extract_sfmt_sat;
-          case 2 : itype = M32RXF_INSN_SATH;goto extract_sfmt_satb;
-          case 3 : itype = M32RXF_INSN_SATB;goto extract_sfmt_satb;
+          case 0 : itype = M32RXF_INSN_SAT; goto extract_sfmt_sat;
+          case 2 : itype = M32RXF_INSN_SATH; goto extract_sfmt_satb;
+          case 3 : itype = M32RXF_INSN_SATB; goto extract_sfmt_satb;
           default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 136 : itype = M32RXF_INSN_ADDV3;goto extract_sfmt_addv3;
-      case 138 : itype = M32RXF_INSN_ADD3;goto extract_sfmt_add3;
-      case 140 : itype = M32RXF_INSN_AND3;goto extract_sfmt_and3;
-      case 141 : itype = M32RXF_INSN_XOR3;goto extract_sfmt_and3;
-      case 142 : itype = M32RXF_INSN_OR3;goto extract_sfmt_or3;
+      case 136 : itype = M32RXF_INSN_ADDV3; goto extract_sfmt_addv3;
+      case 138 : itype = M32RXF_INSN_ADD3; goto extract_sfmt_add3;
+      case 140 : itype = M32RXF_INSN_AND3; goto extract_sfmt_and3;
+      case 141 : itype = M32RXF_INSN_XOR3; goto extract_sfmt_and3;
+      case 142 : itype = M32RXF_INSN_OR3; goto extract_sfmt_or3;
       case 144 :
         {
           unsigned int val = (((insn >> -12) & (1 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RXF_INSN_DIV;goto extract_sfmt_div;
-          case 1 : itype = M32RXF_INSN_DIVH;goto extract_sfmt_div;
+          case 0 : itype = M32RXF_INSN_DIV; goto extract_sfmt_div;
+          case 1 : itype = M32RXF_INSN_DIVH; goto extract_sfmt_div;
           default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 145 : itype = M32RXF_INSN_DIVU;goto extract_sfmt_div;
-      case 146 : itype = M32RXF_INSN_REM;goto extract_sfmt_div;
-      case 147 : itype = M32RXF_INSN_REMU;goto extract_sfmt_div;
-      case 152 : itype = M32RXF_INSN_SRL3;goto extract_sfmt_sll3;
-      case 154 : itype = M32RXF_INSN_SRA3;goto extract_sfmt_sll3;
-      case 156 : itype = M32RXF_INSN_SLL3;goto extract_sfmt_sll3;
-      case 159 : itype = M32RXF_INSN_LDI16;goto extract_sfmt_ldi16;
-      case 160 : itype = M32RXF_INSN_STB_D;goto extract_sfmt_stb_d;
-      case 162 : itype = M32RXF_INSN_STH_D;goto extract_sfmt_sth_d;
-      case 164 : itype = M32RXF_INSN_ST_D;goto extract_sfmt_st_d;
-      case 168 : itype = M32RXF_INSN_LDB_D;goto extract_sfmt_ldb_d;
-      case 169 : itype = M32RXF_INSN_LDUB_D;goto extract_sfmt_ldb_d;
-      case 170 : itype = M32RXF_INSN_LDH_D;goto extract_sfmt_ldh_d;
-      case 171 : itype = M32RXF_INSN_LDUH_D;goto extract_sfmt_ldh_d;
-      case 172 : itype = M32RXF_INSN_LD_D;goto extract_sfmt_ld_d;
-      case 176 : itype = M32RXF_INSN_BEQ;goto extract_sfmt_beq;
-      case 177 : itype = M32RXF_INSN_BNE;goto extract_sfmt_beq;
-      case 184 : itype = M32RXF_INSN_BEQZ;goto extract_sfmt_beqz;
-      case 185 : itype = M32RXF_INSN_BNEZ;goto extract_sfmt_beqz;
-      case 186 : itype = M32RXF_INSN_BLTZ;goto extract_sfmt_beqz;
-      case 187 : itype = M32RXF_INSN_BGEZ;goto extract_sfmt_beqz;
-      case 188 : itype = M32RXF_INSN_BLEZ;goto extract_sfmt_beqz;
-      case 189 : itype = M32RXF_INSN_BGTZ;goto extract_sfmt_beqz;
-      case 220 : itype = M32RXF_INSN_SETH;goto extract_sfmt_seth;
+      case 145 : itype = M32RXF_INSN_DIVU; goto extract_sfmt_div;
+      case 146 : itype = M32RXF_INSN_REM; goto extract_sfmt_div;
+      case 147 : itype = M32RXF_INSN_REMU; goto extract_sfmt_div;
+      case 152 : itype = M32RXF_INSN_SRL3; goto extract_sfmt_sll3;
+      case 154 : itype = M32RXF_INSN_SRA3; goto extract_sfmt_sll3;
+      case 156 : itype = M32RXF_INSN_SLL3; goto extract_sfmt_sll3;
+      case 159 : itype = M32RXF_INSN_LDI16; goto extract_sfmt_ldi16;
+      case 160 : itype = M32RXF_INSN_STB_D; goto extract_sfmt_stb_d;
+      case 162 : itype = M32RXF_INSN_STH_D; goto extract_sfmt_sth_d;
+      case 164 : itype = M32RXF_INSN_ST_D; goto extract_sfmt_st_d;
+      case 168 : itype = M32RXF_INSN_LDB_D; goto extract_sfmt_ldb_d;
+      case 169 : itype = M32RXF_INSN_LDUB_D; goto extract_sfmt_ldb_d;
+      case 170 : itype = M32RXF_INSN_LDH_D; goto extract_sfmt_ldh_d;
+      case 171 : itype = M32RXF_INSN_LDUH_D; goto extract_sfmt_ldh_d;
+      case 172 : itype = M32RXF_INSN_LD_D; goto extract_sfmt_ld_d;
+      case 176 : itype = M32RXF_INSN_BEQ; goto extract_sfmt_beq;
+      case 177 : itype = M32RXF_INSN_BNE; goto extract_sfmt_beq;
+      case 184 : itype = M32RXF_INSN_BEQZ; goto extract_sfmt_beqz;
+      case 185 : itype = M32RXF_INSN_BNEZ; goto extract_sfmt_beqz;
+      case 186 : itype = M32RXF_INSN_BLTZ; goto extract_sfmt_beqz;
+      case 187 : itype = M32RXF_INSN_BGEZ; goto extract_sfmt_beqz;
+      case 188 : itype = M32RXF_INSN_BLEZ; goto extract_sfmt_beqz;
+      case 189 : itype = M32RXF_INSN_BGTZ; goto extract_sfmt_beqz;
+      case 220 : itype = M32RXF_INSN_SETH; goto extract_sfmt_seth;
       case 224 : /* fall through */
       case 225 : /* fall through */
       case 226 : /* fall through */
@@ -510,7 +516,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 236 : /* fall through */
       case 237 : /* fall through */
       case 238 : /* fall through */
-      case 239 : itype = M32RXF_INSN_LD24;goto extract_sfmt_ld24;
+      case 239 : itype = M32RXF_INSN_LD24; goto extract_sfmt_ld24;
       case 240 : /* fall through */
       case 241 : /* fall through */
       case 242 : /* fall through */
@@ -531,12 +537,12 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
           unsigned int val = (((insn >> 8) & (7 << 0)));
           switch (val)
           {
-          case 0 : itype = M32RXF_INSN_BCL24;goto extract_sfmt_bcl24;
-          case 1 : itype = M32RXF_INSN_BNCL24;goto extract_sfmt_bcl24;
-          case 4 : itype = M32RXF_INSN_BC24;goto extract_sfmt_bc24;
-          case 5 : itype = M32RXF_INSN_BNC24;goto extract_sfmt_bc24;
-          case 6 : itype = M32RXF_INSN_BL24;goto extract_sfmt_bl24;
-          case 7 : itype = M32RXF_INSN_BRA24;goto extract_sfmt_bra24;
+          case 0 : itype = M32RXF_INSN_BCL24; goto extract_sfmt_bcl24;
+          case 1 : itype = M32RXF_INSN_BNCL24; goto extract_sfmt_bcl24;
+          case 4 : itype = M32RXF_INSN_BC24; goto extract_sfmt_bc24;
+          case 5 : itype = M32RXF_INSN_BNC24; goto extract_sfmt_bc24;
+          case 6 : itype = M32RXF_INSN_BL24; goto extract_sfmt_bl24;
+          case 7 : itype = M32RXF_INSN_BRA24; goto extract_sfmt_bra24;
           default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
diff --git a/sim/m32r/decodex.h b/sim/m32r/decodex.h
index 6394f03..0880199 100644
--- a/sim/m32r/decodex.h
+++ b/sim/m32r/decodex.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -103,7 +103,7 @@ typedef enum m32rxf_insn_type {
  , M32RXF_INSN_WRITE_SADD, M32RXF_INSN_PAR_MACWU1, M32RXF_INSN_WRITE_MACWU1, M32RXF_INSN_PAR_MSBLO
  , M32RXF_INSN_WRITE_MSBLO, M32RXF_INSN_PAR_MULWU1, M32RXF_INSN_WRITE_MULWU1, M32RXF_INSN_PAR_MACLH1
  , M32RXF_INSN_WRITE_MACLH1, M32RXF_INSN_PAR_SC, M32RXF_INSN_WRITE_SC, M32RXF_INSN_PAR_SNC
- , M32RXF_INSN_WRITE_SNC, M32RXF_INSN_MAX
+ , M32RXF_INSN_WRITE_SNC, M32RXF_INSN__MAX
 } M32RXF_INSN_TYPE;
 
 /* Enum declaration for semantic formats in cpu family m32rxf.  */
diff --git a/sim/m32r/model.c b/sim/m32r/model.c
index 419e581..841026f 100644
--- a/sim/m32r/model.c
+++ b/sim/m32r/model.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -4148,7 +4148,7 @@ m32r_init_cpu (SIM_CPU *cpu)
   CPU_PC_FETCH (cpu) = m32rbf_h_pc_get;
   CPU_PC_STORE (cpu) = m32rbf_h_pc_set;
   CPU_GET_IDATA (cpu) = m32rbf_get_idata;
-  CPU_MAX_INSNS (cpu) = M32RBF_INSN_UNLOCK + 1;
+  CPU_MAX_INSNS (cpu) = M32RBF_INSN__MAX;
   CPU_INSN_NAME (cpu) = cgen_insn_name;
   CPU_FULL_ENGINE_FN (cpu) = m32rbf_engine_run_full;
 #if WITH_FAST
diff --git a/sim/m32r/modelx.c b/sim/m32r/modelx.c
index bdcb93a..a4723a2 100644
--- a/sim/m32r/modelx.c
+++ b/sim/m32r/modelx.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -2879,7 +2879,7 @@ m32rx_init_cpu (SIM_CPU *cpu)
   CPU_PC_FETCH (cpu) = m32rxf_h_pc_get;
   CPU_PC_STORE (cpu) = m32rxf_h_pc_set;
   CPU_GET_IDATA (cpu) = m32rxf_get_idata;
-  CPU_MAX_INSNS (cpu) = M32RXF_INSN_SNC + 1;
+  CPU_MAX_INSNS (cpu) = M32RXF_INSN__MAX;
   CPU_INSN_NAME (cpu) = cgen_insn_name;
   CPU_FULL_ENGINE_FN (cpu) = m32rxf_engine_run_full;
 #if WITH_FAST
diff --git a/sim/m32r/sem-switch.c b/sim/m32r/sem-switch.c
index 2d5489c..9d08e57 100644
--- a/sim/m32r/sem-switch.c
+++ b/sim/m32r/sem-switch.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
diff --git a/sim/m32r/sem.c b/sim/m32r/sem.c
index 8a20cc1..7360933 100644
--- a/sim/m32r/sem.c
+++ b/sim/m32r/sem.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
diff --git a/sim/m32r/semx-switch.c b/sim/m32r/semx-switch.c
index 3cc95b0..d9919dc 100644
--- a/sim/m32r/semx-switch.c
+++ b/sim/m32r/semx-switch.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.