* cpu.c,model.c,sem-switch.c,sem.c: Regenerated. Mostly comment

	and variable renaming due to macro insn additions.
	* mloop.in: Update to use CGEN_INSN_NUM.
	* cpu.x,modelx.c,readx.c,semx.c: Regenerated.
	* mloopx.in: Update to use CGEN_INSN_NUM.

1 files changed, 10 insertions, 61 deletions

diff --git a/sim/m32r/modelx.c b/sim/m32r/modelx.c
index fda2e48..df080b6 100644
--- a/sim/m32r/modelx.c
+++ b/sim/m32r/modelx.c
@@ -42,7 +42,7 @@ m32rx_model_profile_insn (SIM_CPU *current_cpu, ARGBUF *abuf)
   const MODEL *model = CPU_MODEL (current_cpu);
   const INSN_TIMING *timing = MODEL_TIMING (model);
   const CGEN_INSN *insn = abuf->opcode;
-  const UNIT *unit = &timing[CGEN_INSN_INDEX (insn)].units[0];
+  const UNIT *unit = &timing[CGEN_INSN_NUM (insn)].units[0];
   const UNIT *unit_end = unit + MAX_UNITS;
   PROFILE_DATA *profile = CPU_PROFILE_DATA (current_cpu);
 
@@ -67,7 +67,7 @@ m32rx_model_profile_cti_insn (SIM_CPU *current_cpu, ARGBUF *abuf, int taken_p)
   const MODEL *model = CPU_MODEL (current_cpu);
   const INSN_TIMING *timing = MODEL_TIMING (model);
   const CGEN_INSN *insn = abuf->opcode;
-  const UNIT *unit = &timing[CGEN_INSN_INDEX (insn)].units[0];
+  const UNIT *unit = &timing[CGEN_INSN_NUM (insn)].units[0];
   const UNIT *unit_end = unit + MAX_UNITS;
   PROFILE_DATA *profile = CPU_PROFILE_DATA (current_cpu);
 
@@ -97,26 +97,18 @@ static const INSN_TIMING m32rx_timing[] = {
   { { (UQI) UNIT_NONE } }, /* illegal insn */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* add */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* add3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* add3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* and */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* and3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* and3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* or */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* or3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* or3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* xor */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* xor3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* xor3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* addi */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* addi.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* addv */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* addv3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* addv3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* addx */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bc8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bc8.s */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bc24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bc24.l */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* beq */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* beqz */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bgez */
@@ -125,82 +117,59 @@ static const INSN_TIMING m32rx_timing[] = {
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bltz */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bnez */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bl8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bl8.s */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bl24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bl24.l */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bcl8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bcl8.s */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bcl24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bcl24.l */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bnc8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bnc8.s */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bnc24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bnc24.l */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bne */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bra8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bra8.s */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bra24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bra24.l */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bncl8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bncl8.s */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bncl24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bncl24.l */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmp */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpi */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpi.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpu */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpui */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpui.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpeq */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpz */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* div */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* divu */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rem */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* remu */
-  { { (UQI) UNIT_M32RX_U_EXEC, 27, 27 } }, /* divh */
+  { { (UQI) UNIT_M32RX_U_EXEC, 21, 21 } }, /* divh */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* jc */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* jnc */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* jl */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* jmp */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldb */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldb-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldb-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldb-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldh */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldh-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldh-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldh-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldub */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldub-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldub-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldub-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* lduh */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* lduh-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* lduh-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* lduh-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld-plus */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld24.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldi8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldi8.a */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldi8a */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldi8a.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldi16 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldi16a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* lock */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* machi-a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* maclo-a */
+  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* macwhi */
+  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* macwlo */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mul */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mulhi-a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mullo-a */
+  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mulwhi */
+  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mulwlo */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mv */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mvfachi-a */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mvfaclo-a */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mvfacmi-a */
+  { { (UQI) UNIT_M32RX_U_EXEC, 2, 2 } }, /* mvfachi-a */
+  { { (UQI) UNIT_M32RX_U_EXEC, 2, 2 } }, /* mvfaclo-a */
+  { { (UQI) UNIT_M32RX_U_EXEC, 2, 2 } }, /* mvfacmi-a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mvfc */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mvtachi-a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mvtaclo-a */
@@ -208,52 +177,32 @@ static const INSN_TIMING m32rx_timing[] = {
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* neg */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* nop */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* not */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rac-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rac-ds */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rac-dsi */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rach-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rach-ds */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rach-dsi */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rte */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* seth */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* seth.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sll */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sll3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sll3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* slli */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* slli.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sra */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sra3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sra3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srai */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srai.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srl */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srl3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srl3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srli */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srli.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* st */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* st-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* st-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* st-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* stb */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* stb-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* stb-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* stb-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sth */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sth-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sth-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sth-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* st-plus */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* st-minus */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sub */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* subv */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* subx */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* trap */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* trap.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* unlock */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* push */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* pop */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* satb */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sath */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sat */