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author | Andrew Cagney <cagney@redhat.com> | 2003-12-07 02:27:45 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 2003-12-07 02:27:45 +0000 |
commit | 3c041444b57e94d5415b31409e80e25b1333a52b (patch) | |
tree | d342a95a84b8824edcc21e5d0e8f2786518dd17e /sim/m32r/m32r.c | |
parent | 48ecb30c92a29b12766e9b1b0bac69aba01bd9ea (diff) | |
download | gdb-3c041444b57e94d5415b31409e80e25b1333a52b.zip gdb-3c041444b57e94d5415b31409e80e25b1333a52b.tar.gz gdb-3c041444b57e94d5415b31409e80e25b1333a52b.tar.bz2 |
2003-12-02 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
* Makefile.in : Add new machine m32r2.
* m32r2.c : New file for m32r2.
* mloop2.in : Ditto
* model2.c : Ditto
* sem2-switch.c : Ditto
* m32r-sim.h : Add EVB register.
* sim-if.h : Ditto
* sim-main.h : Ditto
* traps.c : Ditto
Diffstat (limited to 'sim/m32r/m32r.c')
-rw-r--r-- | sim/m32r/m32r.c | 53 |
1 files changed, 45 insertions, 8 deletions
diff --git a/sim/m32r/m32r.c b/sim/m32r/m32r.c index 3e5e4aa..fc8586c 100644 --- a/sim/m32r/m32r.c +++ b/sim/m32r/m32r.c @@ -39,6 +39,7 @@ m32r_decode_gdb_ctrl_regnum (int gdb_regnum) case BPC_REGNUM : return H_CR_BPC; case BBPSW_REGNUM : return H_CR_BBPSW; case BBPC_REGNUM : return H_CR_BBPC; + case EVB_REGNUM : return H_CR_CR5; } abort (); } @@ -62,26 +63,33 @@ m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len case BPC_REGNUM : case BBPSW_REGNUM : case BBPC_REGNUM : + case EVB_REGNUM : SETTWI (buf, a_m32r_h_cr_get (current_cpu, m32r_decode_gdb_ctrl_regnum (rn))); break; case PC_REGNUM : if (mach == MACH_M32R) SETTWI (buf, m32rbf_h_pc_get (current_cpu)); - else + else if (mach == MACH_M32RX) SETTWI (buf, m32rxf_h_pc_get (current_cpu)); + else + SETTWI (buf, m32r2f_h_pc_get (current_cpu)); break; case ACCL_REGNUM : if (mach == MACH_M32R) SETTWI (buf, GETLODI (m32rbf_h_accum_get (current_cpu))); - else + else if (mach == MACH_M32RX) SETTWI (buf, GETLODI (m32rxf_h_accum_get (current_cpu))); + else + SETTWI (buf, GETLODI (m32r2f_h_accum_get (current_cpu))); break; case ACCH_REGNUM : if (mach == MACH_M32R) SETTWI (buf, GETHIDI (m32rbf_h_accum_get (current_cpu))); - else + else if (mach == MACH_M32RX) SETTWI (buf, GETHIDI (m32rxf_h_accum_get (current_cpu))); + else + SETTWI (buf, GETHIDI (m32r2f_h_accum_get (current_cpu))); break; default : return 0; @@ -109,6 +117,7 @@ m32rbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len case BPC_REGNUM : case BBPSW_REGNUM : case BBPC_REGNUM : + case EVB_REGNUM : a_m32r_h_cr_set (current_cpu, m32r_decode_gdb_ctrl_regnum (rn), GETTWI (buf)); @@ -116,21 +125,27 @@ m32rbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len case PC_REGNUM : if (mach == MACH_M32R) m32rbf_h_pc_set (current_cpu, GETTWI (buf)); - else + else if (mach == MACH_M32RX) m32rxf_h_pc_set (current_cpu, GETTWI (buf)); + else + m32r2f_h_pc_set (current_cpu, GETTWI (buf)); break; case ACCL_REGNUM : { DI val; if (mach == MACH_M32R) val = m32rbf_h_accum_get (current_cpu); - else + else if (mach == MACH_M32RX) val = m32rxf_h_accum_get (current_cpu); + else + val = m32r2f_h_accum_get (current_cpu); SETLODI (val, GETTWI (buf)); if (mach == MACH_M32R) m32rbf_h_accum_set (current_cpu, val); - else + else if (mach == MACH_M32RX) m32rxf_h_accum_set (current_cpu, val); + else + m32r2f_h_accum_set (current_cpu, val); break; } case ACCH_REGNUM : @@ -138,13 +153,17 @@ m32rbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len DI val; if (mach == MACH_M32R) val = m32rbf_h_accum_get (current_cpu); - else + else if (mach == MACH_M32RX) val = m32rxf_h_accum_get (current_cpu); + else + val = m32r2f_h_accum_get (current_cpu); SETHIDI (val, GETTWI (buf)); if (mach == MACH_M32R) m32rbf_h_accum_set (current_cpu, val); - else + else if (mach == MACH_M32RX) m32rxf_h_accum_set (current_cpu, val); + else + m32r2f_h_accum_set (current_cpu, val); break; } default : @@ -169,6 +188,10 @@ a_m32r_h_gr_get (SIM_CPU *current_cpu, UINT regno) case MACH_M32RX : return m32rxf_h_gr_get (current_cpu, regno); #endif +#ifdef HAVE_CPU_M32R2F + case MACH_M32R2 : + return m32r2f_h_gr_get (current_cpu, regno); +#endif default : abort (); } @@ -189,6 +212,11 @@ a_m32r_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval) m32rxf_h_gr_set (current_cpu, regno, newval); break; #endif +#ifdef HAVE_CPU_M32RXF + case MACH_M32R2 : + m32r2f_h_gr_set (current_cpu, regno, newval); + break; +#endif default : abort (); } @@ -207,6 +235,10 @@ a_m32r_h_cr_get (SIM_CPU *current_cpu, UINT regno) case MACH_M32RX : return m32rxf_h_cr_get (current_cpu, regno); #endif +#ifdef HAVE_CPU_M32R2F + case MACH_M32R2 : + return m32r2f_h_cr_get (current_cpu, regno); +#endif default : abort (); } @@ -227,6 +259,11 @@ a_m32r_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval) m32rxf_h_cr_set (current_cpu, regno, newval); break; #endif +#ifdef HAVE_CPU_M32RXF + case MACH_M32R2 : + m32r2f_h_cr_set (current_cpu, regno, newval); + break; +#endif default : abort (); } |